Improving Bandwidth while Managing Phase Noise and Spurs in Fractional-N PLL. - Xiao Pu 006; Axel Thomsen; Jacob A. Abraham (ISVLSI, 2008)

A Novel fractional-n PLL Based on a Simple Reference Multiplier. - Xiao Pu 006; Krishnaswamy Nagaraj; Jacob A. Abraham; Axel Thomsen (J. Circuits Syst. Comput., 2012)

Area-Efficient Low-Noise Low-Spur Architecture for an Analog PLL Working From a Low Frequency Reference. - Xiao Pu 006; Ajay Kumar; Krishnaswamy Nagaraj (IEEE Trans. Circuits Syst. II Express Briefs, 2012)

Corrections to "Area-Efficient Low-Noise Low-Spur Architecture for an Analog PLL Working From a Low Frequency Reference". - Xiao Pu 006; Ajay Kumar; Krishnaswamy Nagaraj (IEEE Trans. Circuits Syst. II Express Briefs, 2014)

An Embedded 65 nm CMOS Remote Temperature Sensor With Digital Beta Correction and Series Resistance Cancellation Achieving an Inaccuracy of 0.4°C (3σ) From - 40°C to 130°C. - Xiao Pu 006; Mikel Ash; Krishnaswamy Nagaraj; Joonsung Park; Steve Vu; Paul Kimelman; Sean de la Haye (IEEE J. Solid State Circuits, 2015)