Xiao Zhang

Orcid: 0000-0002-6625-6514

Affiliations:
  • University of Twente, Centre of Telecommunication and Information Technology, Enschede, The Netherlands


According to our database1, Xiao Zhang authored at least 12 papers between 2006 and 2021.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2021
Machine Learning Based Bearing Fault Diagnosis Using the Case Western Reserve University Data: A Review.
IEEE Access, 2021

2013
Power-dissipation comparison of two dependability approaches for multi-processor systems.
Proceedings of the 8th International Conference on Design & Technology of Integrated Systems in Nanoscale Era, 2013

2011
A Dependability Solution for Homogeneous MPSoCs.
Proceedings of the 17th IEEE Pacific Rim International Symposium on Dependable Computing, 2011

2010
On-line dependability enhancement of multiprocessor SoCs by resource management.
Proceedings of the 2010 International Symposium on System on Chip, SoC 2010, Tampere, 2010

New scan-based test strategy for a dependable many-core processor using a NoC as a Test Access Mechanism.
Proceedings of the 15th European Test Symposium, 2010

On-chip Scan-Based Test Strategy for a Dependable Many-Core Processor Using a NoC as a Test Access Mechanism.
Proceedings of the 13th Euromicro Conference on Digital System Design, 2010

Design of an Infrastructural IP Dependability Manager for a Dependable Reconfigurable Many-Core Processor.
Proceedings of the Fifth IEEE International Symposium on Electronic Design, 2010

2009
Fault co-simulation for test evaluation of heterogeneous integrated biological systems.
Microelectron. J., 2009

Design of a Highly Dependable Beamforming Chip.
Proceedings of the 12th Euromicro Conference on Digital System Design, 2009

2008
A Dependable Micro-Electronic Peptide Synthesizer Using Electrode Data.
VLSI Design, 2008

Built-in-Self-Diagnostics for a NoC-Based Reconfigurable IC for Dependable Beamforming Applications.
Proceedings of the 23rd IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2008), 2008

2006
Fault Modelling and Co-Simulation in FlowFET-Based Biological Array Systems.
Proceedings of the Third IEEE International Workshop on Electronic Design, 2006


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