Synthesizing A Generalized Brain-inspired Interconnection Network for Large-scale Network-on-chip Systems. - Mengke Ge; Qi Xu; Huajie Ruan; Xiaobing Ni; Song Chen 001; Yi Kang (ACM Great Lakes Symposium on VLSI, 2020)

Generating Brain-Network-Inspired Topologies for Large-Scale NoCs on Monolithic 3D ICs. - Mengke Ge; Xiaobing Ni; Song Chen 001; Yi Kang (IEEE Trans. Circuits Syst. II Express Briefs, 2022)

Synthesizing Brain-network-inspired Interconnections for Large-scale Network-on-chips. - Mengke Ge; Xiaobing Ni; Qi Xu; Song Chen 001; Jinglei Huang; Yi Kang; Feng Wu 001 (ACM Trans. Design Autom. Electr. Syst., 2022)

BandMap: Application Mapping with Bandwidth Allocation forCoarse-Grained Reconfigurable Array. - Xiaobing Ni; Jiaheng Ruan; Mengke Ge; Wendi Sun; Song Chen 001; Yi Kang (CoRR, 2023)

BusMap: Application Mapping With Bus Routing for Coarse-Grained Reconfigurable Array. - Xiaobing Ni; Mengke Ge; Yongjin Tao; Wendi Sun; Feixiang Duan; Xuefei Bai; Qi Xu; Song Chen 001; Yi Kang (IEEE Trans. Circuits Syst. II Express Briefs, 2023)

Parallel Multi-Objective Bayesian Optimization Framework for CGRA Microarchitecture. - Bing Li; Wendi Sun; Xiaobing Ni; Kaixuan He; Qi Xu; Song Chen 001; Yi Kang (DATE, 2024)

SparseMap: Loop Mapping for Sparse CNNs on Streaming Coarse-grained Reconfigurable Array. - Xiaobing Ni; Mengke Ge; Jiaheng Ruan; Song Chen 001; Yi Kang (CoRR, 2024)