A 0.4V 430nA quiescent current NMOS digital LDO with NAND-based analog-assisted loop in 28nm CMOS. - Xiaofei Ma 004; Yan Lu 002; Rui Paulo Martins; Qiang Li 021 (ISSCC, 2018)

An NMOS Digital LDO With NAND-Based Analog-Assisted Loop in 28-nm CMOS. - Xiaofei Ma 004; Yan Lu 002; Qiang Li 021; Wing-Hung Ki; Rui Paulo Martins (IEEE Trans. Circuits Syst., 2020)

A Fully Integrated LDO With 50-mV Dropout for Power Efficiency Optimization. - Xiaofei Ma 004; Yan Lu 002; Qiang Li 021 (IEEE Trans. Circuits Syst. II Express Briefs, 2020)

A 27W D2D Wireless Power Transfer System with Compact Single-Stage Regulated Class-E Architecture and Adaptive ZVS Control. - Xiaofei Ma 004; Yan Lu 002; Wing-Hung Ki (ISSCC, 2022)

D2 Buck Converter With Delay-Insensitive Response and Adaptive On-Time Extension During Load Transient. - Lingfeng Zhu; Wing-Hung Ki; Yue Zhong; Xiaofei Ma 004; Junmin Jiang (ISCAS, 2024)

A 27 W Wireless Power Transceiver With Compact Single-Stage Regulated Class-E Architecture and Adaptive ZVS Control. - Xiaofei Ma 004; Wing-Hung Ki; Yan Lu 002 (IEEE J. Solid State Circuits, 2024)