A 5GHz 200kHz/5000ppm Spread-Spectrum Clock Generator with Calibration-Free Two-Point Modulation Using a Nested-Loop BBPLL. - Xiaohua Huang 002; Kunnong Zeng; Yuguang Liu; Woogeun Rhee; Taeik Kim; Zhihua Wang 001 (CICC, 2019)

Interoperability Improvement for Wireless Electric Vehicle Charging System Using Adaptive Phase-Control Transmitter. - Guang Yang 015; Kai Song 001; Ruizhi Wei; Xiaohua Huang 002; Hang Zhang; Qian Zhang; Chunbo Zhu (IEEE Access, 2019)

Going beyond what is visible: What multichannel data can reveal about interaction in the context of collaborative learning? - Jonna Malmberg; Sanna Järvelä; Jukka Holappa; Eetu Haataja; Xiaohua Huang 002; Antti Siipo (Comput. Hum. Behav., 2019)

Modeling and Analysis of Thermal Characteristics of Magnetic Coupler for Wireless Electric Vehicle Charging System. - Ce Liang; Guang Yang 015; Feng Yuan; Xiaohua Huang 002; Ying Sun 013; Jin Li; Kai Song 001 (IEEE Access, 2020)

Audience leisure involvement, satisfaction and behavior intention at the Macau Science Center. - Zhi Li 068; Yuemeng Ge; Zegang Su; Xiaohua Huang 002 (Electron. Libr., 2020)

A 256-Channel Actively-Multiplexed µECoG Implant with Column-Parallel Incremental ΔΣ ADCs Employing Bulk-DACs in 22-nm FDSOI Technology. - Xiaohua Huang 002; Horacio Londoño-Ramírez; Marco Ballini; Chris Van Hoof; Jan Genoe; Sebastian Haesler; Georges G. E. Gielen; Nick Van Helleputte; Carolina Mora Lopez (ISSCC, 2022)

Actively Multiplexed μECoG Brain Implant System With Incremental-ΔΣ ADCs Employing Bulk-DACs. - Xiaohua Huang 002; Horacio Londoño-Ramírez; Marco Ballini; Chris Van Hoof; Jan Genoe; Sebastian Haesler; Georges G. E. Gielen; Nick Van Helleputte; Carolina Mora Lopez (IEEE J. Solid State Circuits, 2022)

Feature refinement: An expression-specific feature learning and fusion method for micro-expression recognition. - Ling Zhou 005; Qirong Mao; Xiaohua Huang 002; Feifei Zhang; Zhihong Zhang 001 (Pattern Recognit., 2022)

A Compact, Low-Power Analog Front-End With Event-Driven Input Biasing for High-Density Neural Recording in 22-nm FDSOI. - Xiaohua Huang 002; Marco Ballini; Shiwei Wang 001; Beatrice Miccoli; Chris Van Hoof; Georges G. E. Gielen; Jan Craninckx; Nick Van Helleputte; Carolina Mora Lopez (IEEE Trans. Circuits Syst. II Express Briefs, 2022)

A 3072-Channel Neural Readout IC with Multiplexed Two-Step Incremental-SAR Conversion and Bulk-DAC-Based EDO Compensation in 22nm FDSOI. - Xiaohua Huang 002; Xiaolin Yang; Andrea Lodi 003; Chris Van Hoof; Georges G. E. Gielen; Carolina Mora Lopez (VLSI Technology and Circuits, 2024)