Practical variation-aware interconnect delay and slew analysis for statistical timing verification. - Xiaoji Ye; Peng Li 001; Frank Liu 001 (ICCAD, 2006)

Efficient Frequency-Domain Simulation of Massive Clock Meshes Using Parallel Harmonic Balance. - Wei Dong 002; Peng Li 001; Xiaoji Ye (CICC, 2007)

Statistical Leakage Power Minimization Using Fast Equi-Slack Shell Based Optimization. - Xiaoji Ye; Yaping Zhan; Peng Li 001 (DAC, 2007)

Analysis of large clock meshes via harmonic-weighted model order reduction and port sliding. - Xiaoji Ye; Peng Li 001; Min Zhao 001; Rajendran Panda; Jiang Hu (ICCAD, 2007)

Fast Variational Interconnect Delay and Slew Computation Using Quadratic Models. - Xiaoji Ye; Frank Liu 001; Peng Li 001 (IEEE Trans. Very Large Scale Integr. Syst., 2007)

WavePipe: parallel transient simulation of analog and digital circuits on multi-core shared-memory machines. - Wei Dong 002; Peng Li 001; Xiaoji Ye (DAC, 2008)

MAPS: multi-algorithm parallel circuit simulation. - Xiaoji Ye; Wei Dong 002; Peng Li 001; Sani R. Nassif (ICCAD, 2008)

Accelerating Clock Mesh Simulation Using Matrix-Level Macromodels and Dynamic Time Step Rounding. - Xiaoji Ye; Min Zhao 001; Rajendran Panda; Peng Li 001; Jiang Hu (ISQED, 2008)

Leveraging efficient parallel pattern search for clock mesh optimization. - Xiaoji Ye; Srinath Narasimhan; Peng Li 001 (ICCAD, 2009)

An application-specific adjoint sensitivity analysis framework for clock mesh sensitivity computation. - Xiaoji Ye; Peng Li 001 (ISQED, 2009)

Parallel program performance modeling for runtime optimization of multi-algorithm circuit simulation. - Xiaoji Ye; Peng Li 001 (DAC, 2010)

Tradeoff analysis and optimization of power delivery networks with on-chip voltage regulation. - Zhiyu Zeng; Xiaoji Ye; Zhuo Feng; Peng Li 001 (DAC, 2010)

On-the-fly runtime adaptation for efficient execution of parallel multi-algorithm circuit simulation. - Xiaoji Ye; Peng Li 001 (ICCAD, 2010)

Accurate clock mesh sizing via sequential quadraticprogramming. - Venkata Rajesh Mekala; Yifang Liu; Xiaoji Ye; Jiang Hu; Peng Li 001 (ISPD, 2010)

Scalable Analysis of Mesh-Based Clock Distribution Networks Using Application-Specific Reduced Order Modeling. - Xiaoji Ye; Peng Li 001; Min Zhao 001; Rajendran Panda; Jiang Hu (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2010)

Exact Time-Domain Second-Order Adjoint-Sensitivity Computation for Linear Circuit Analysis and Optimization. - Xiaoji Ye; Peng Li 001; Frank Ying Liu (IEEE Trans. Circuits Syst. I Regul. Pap., 2010)

Hierarchical Multialgorithm Parallel Circuit Simulation. - Xiaoji Ye; Wei Dong 002; Peng Li 001; Sani R. Nassif (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2011)