Optimal Pipeline Performance via Transactional Slice with No Branch Prediction Overhead. - Shahnawaz Talpur; Feng Shi 009; Xiaojun Wang 005; Xu Chen 016; Yizhou Wang; Shahnawaz Farhan Khahro (UKSim, 2014)

An adaptive and hierarchical task scheduling scheme for multi-core clusters. - Yizhuo Wang 001; Yang Zhang 037; Yan Su; Xiaojun Wang 005; Xu Chen 016; Weixing Ji; Feng Shi 009 (Parallel Comput., 2014)

An evaluation power model for TriBA based application mapping and memory-on-chip. - Xiaojun Wang 005; Feng Shi 009; Xu Chen 016; Fei Yin (ICNC-FSKD, 2017)

An Efficient Distributed Minimal Routing Algorithm for Triplet-Based WK-recursive Network. - Xu Chen 016; Feng Shi 009; Fei Yin; Zenghui Wei; Xiaojun Wang 005 (HPCC/SmartCity/DSS, 2018)

A novel look-ahead routing algorithm based on graph theory for triplet-based network-on-chip router. - Xu Chen 016; Feng Shi 009; Fei Yin; Xiaojun Wang 005 (IEICE Electron. Express, 2018)

Power-aware high level evaluation model of interconnect length of on-chip memory network topology. - Xiaojun Wang 005; Feng Shi 009; Yi-Zhuo Wang 001; Hong Zhang 036; Xu Chen 016; Wen-Fei Fu (Int. J. Comput. Sci. Eng., 2018)

KLSAT: An Application Mapping Algorithm Based on Kernighan-Lin Partition and Simulated Annealing for a Specific WK-Recursive NoC Architecture. - Xiaojun Wang 005; Feng Shi 009; Hong Zhang 036 (NPC, 2019)

A Novel Speedup Evaluation for Multicore Architecture Based Topology of On-Chip Memory. - Xiaojun Wang 005; Feng Shi 009; Hong Zhang 036 (PAAP, 2019)

KGT: An Application Mapping Algorithm Based on Kernighan-Lin Partition and Genetic Algorithm for WK-Recursive NoC Architecture. - Hong Zhang 036; Xiaojun Wang 005 (ICIC (1), 2021)