A 1 GHz CMOS comparator with dynamic offset control technique. - Xiaolei Zhu 002; Sanroku Tsukamoto; Tadahiro Kuroda (ASP-DAC, 2009)

Split Capacitor DAC Mismatch Calibration in Successive Approximation ADC. - Yanfei Chen; Xiaolei Zhu 002; Hirotaka Tamura; Masaya Kibune; Yasumoto Tomita; Takayuki Hamada; Masato Yoshioka; Kiyoshi Ishikawa; Takeshi Takayama; Junji Ogawa; Sanroku Tsukamoto; Tadahiro Kuroda (IEICE Trans. Electron., 2010)

A Dynamic Offset Control Technique for Comparator Design in Scaled CMOS Technology. - Xiaolei Zhu 002; Yanfei Chen; Masaya Kibune; Yasumoto Tomita; Takayuki Hamada; Hirotaka Tamura; Sanroku Tsukamoto; Tadahiro Kuroda (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2010)

A 9-bit 100MS/s tri-level charge redistribution SAR ADC with asymmetric CDAC array. - Xiaolei Zhu 002; Yanfei Chen; Sanroku Tsukamoto; Tadahiro Kuroda (VLSI-DAT, 2012)

A 9-bit 100 MS/s SAR ADC with Digitally Assisted Background Calibration. - Xiaolei Zhu 002; Yanfei Chen; Sanroku Tsukamoto; Tadahiro Kuroda (IEICE Trans. Electron., 2012)