A 10-bit Two-Stage Pipeline SAR ADC in 55nm CMOS for Compute-in-Memory Applications. - Xiapeng Xu; Yongteng Ma; Xuliang Yu; Fanzi Meng; Wei-Han Yu; Liang Zhao (APCCAS, 2024)

ConvFIFO: A Crossbar Memory PIM Architecture for ConvNets Featuring First-In-First-Out Dataflow. - Liang Zhao; Yu Qian; Fanzi Meng; Xiapeng Xu; Xunzhao Yin; Cheng Zhuo (ASPDAC, 2024)

Enhancing ConvNets With ConvFIFO: A Crossbar PIM Architecture Based on Kernel-Stationary First-In-First-Out Dataflow. - Yu Qian; Liang Zhao; Fanzi Meng; Xiapeng Xu; Cheng Zhuo; Xunzhao Yin (IEEE Trans. Very Large Scale Integr. Syst., 2024)