SRI-SURF: A better SURF powered by scaled-RAM interpolator on FPGA. - Xijie Jia; Kaiyuan Guo; Wenqiang Wang; Yu Wang 002; Huazhong Yang (FPL, 2016)

Multi-task ADAS system on FPGA. - Jinzhang Peng; Lu Tian; Xijie Jia; Haotian Guo; Yongsheng Xu; Dongliang Xie; Hong Luo; Yi Shan; Yu Wang 002 (AICAS, 2019)

DNNVM: End-to-End Compiler Leveraging Operation Fusion on FPGA-based CNN Accelerators. - Yu Xing; Shuang Liang 010; Lingzhi Sui; Zhen Zhang; Jiantao Qiu; Xijie Jia; Xin Liu; Yushun Wang; Yi Shan; Yu Wang 002 (FPGA, 2019)

A High-Performance CNN Processor Based on FPGA for MobileNets. - Di Wu 013; Yu Zhang; Xijie Jia; Lu Tian; Tianping Li; Lingzhi Sui; Dongliang Xie; Yi Shan (FPL, 2019)

LPAC: A Low-Precision Accelerator for CNN on FPGAs. - Tianyu Zhang; Tiantian Han; Lu Tian; Yi Li; Xijie Jia; Guangdong Liu; Pingbo An; Yingran Tan; Lingzhi Sui; Shaoxia Fang; Dongliang Xie; Michaela Blott; et al. (FPGA, 2020)

DNNVM: End-to-End Compiler Leveraging Heterogeneous Optimizations on FPGA-Based CNN Accelerators. - Yu Xing; Shuang Liang 010; Lingzhi Sui; Xijie Jia; Jiantao Qiu; Xin Liu; Yushun Wang; Yi Shan; Yu Wang 002 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020)

XVDPU: A High Performance CNN Accelerator on the Versal Platform Powered by the AI Engine. - Xijie Jia; Yu Zhang; Guangdong Liu; Xinlin Yang; Tianyu Zhang; Jia Zheng; Dongdong Xu; Hong Wang; Rongzhang Zheng; Satyaprakash Pareek; Lu Tian; Dongliang Xie; et al. (FPL, 2022)

A-U3D: A Unified 2D/3D CNN Accelerator on the Versal Platform for Disparity Estimation. - Tianyu Zhang; Dong Li 025; Hong Wang; Yunzhi Li; Xiang Ma; Wei Luo; Yu Wang 178; Yang Huang; Yi Li; Yu Zhang; Xinlin Yang; Xijie Jia; et al. (FPL, 2022)

XVDPU: A High-Performance CNN Accelerator on the Versal Platform Powered by the AI Engine. - Xijie Jia; Yu Zhang; Guangdong Liu; Xinlin Yang; Tianyu Zhang; Jia Zheng; Dongdong Xu; Zhuohuan Liu; Mengke Liu; Xiaoyang Yan; Hong Wang; Rongzhang Zheng; et al. (ACM Trans. Reconfigurable Technol. Syst., 2024)