Xin Fang

Orcid: 0000-0001-6186-541X

Affiliations:
  • Qualcomm Inc., Boxborough, MA, USA
  • Northeastern University, Boston, MA, USA (former)


According to our database1, Xin Fang authored at least 9 papers between 2013 and 2019.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

Online presence:

On csauthors.net:

Bibliography

2019
SIFO: Secure Computational Infrastructure Using FPGA Overlays.
Int. J. Reconfigurable Comput., 2019

Garbled Circuits in the Cloud using FPGA Enabled Nodes.
Proceedings of the 2019 IEEE High Performance Extreme Computing Conference, 2019

2017
Secure Function Evaluation Using an FPGA Overlay Architecture.
Proceedings of the 2017 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2017

2016
Open-Source Variable-Precision Floating-Point Library for Major Commercial FPGAs.
ACM Trans. Reconfigurable Technol. Syst., 2016

2015
Side-Channel Analysis of MAC-Keccak Hardware Implementations.
IACR Cryptol. ePrint Arch., 2015

Leakage evaluation on power balance countermeasure against side-channel attack on FPGAs.
Proceedings of the 2015 IEEE High Performance Extreme Computing Conference, 2015

Balance power leakage to fight against side-channel analysis at gate level in FPGAs.
Proceedings of the 26th IEEE International Conference on Application-specific Systems, 2015

2014
Power Analysis Attack on Hardware Implementation of MAC-Keccak on FPGAs.
IACR Cryptol. ePrint Arch., 2014

2013
Vendor agnostic, high performance, double precision Floating Point division for FPGAs.
Proceedings of the IEEE High Performance Extreme Computing Conference, 2013


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