Vendor agnostic, high performance, double precision Floating Point division for FPGAs. - Xin Fang 001; Miriam Leeser (HPEC, 2013)

Power Analysis Attack on Hardware Implementation of MAC-Keccak on FPGAs. - Pei Luo; Yunsi Fei; Xin Fang 001; A. Adam Ding; Miriam Leeser; David R. Kaeli (IACR Cryptol. ePrint Arch., 2014)

Balance power leakage to fight against side-channel analysis at gate level in FPGAs. - Xin Fang 001; Pei Luo; Yunsi Fei; Miriam Leeser (ASAP, 2015)

Leakage evaluation on power balance countermeasure against side-channel attack on FPGAs. - Xin Fang 001; Pei Luo; Yunsi Fei; Miriam Leeser (HPEC, 2015)

Side-Channel Analysis of MAC-Keccak Hardware Implementations. - Pei Luo; Yunsi Fei; Xin Fang 001; A. Adam Ding; David R. Kaeli; Miriam Leeser (IACR Cryptol. ePrint Arch., 2015)

Open-Source Variable-Precision Floating-Point Library for Major Commercial FPGAs. - Xin Fang 001; Miriam Leeser (ACM Trans. Reconfigurable Technol. Syst., 2016)

Secure Function Evaluation Using an FPGA Overlay Architecture. - Xin Fang 001; Stratis Ioannidis; Miriam Leeser (FPGA, 2017)

Garbled Circuits in the Cloud using FPGA Enabled Nodes. - Kai Huang; Mehmet Güngör; Xin Fang 001; Stratis Ioannidis; Miriam Leeser (HPEC, 2019)

SIFO: Secure Computational Infrastructure Using FPGA Overlays. - Xin Fang 001; Stratis Ioannidis; Miriam Leeser (Int. J. Reconfigurable Comput., 2019)