Cache locking vs. partitioning for real-time computing on integrated CPU-GPU processors. - Xin Wang 056; Wei Zhang 002 (IPCCC, 2016)

Drowsy Register Files for Reducing GPU Leakage Energy. - Xin Wang 056; Wei Zhang 002 (ICPADS, 2017)

GPU Register Packing: Dynamically Exploiting Narrow-Width Operands to Improve Performance. - Xin Wang 056; Wei Zhang 002 (TrustCom/BigDataSE/ICESS, 2017)

A Sample-Based Dynamic CPU and GPU LLC Bypassing Method for Heterogeneous CPU-GPU Architectures. - Xin Wang 056; Wei Zhang 002 (TrustCom/BigDataSE/ICESS, 2017)

Energy-Efficient DNN Computing on GPUs Through Register File Management. - Xin Wang 056; Wei Zhang 002 (HPEC, 2018)

Packing Narrow-Width Operands to Improve GPU Performance. - Xin Wang 056; Wei Zhang 002 (J. Comput. Sci. Eng., 2018)

Improving CPU and GPU Performance through Sample-Based Dynamic LLC Bypassing. - Xin Wang 056; Wei Zhang 002 (J. Comput. Sci. Eng., 2018)

Cracking Randomized Coalescing Techniques with An Efficient Profiling-Based Side-Channel Attack to GPU. - Xin Wang 056; Wei Zhang 002 (HASP@ISCA, 2019)

Execution Units Power-Gating to Improve Energy Efficiency of GPGPUs. - Xin Wang 056; Wei Zhang 002 (iThings/GreenCom/CPSCom/SmartData, 2019)

An Efficient Profiling-Based Side-Channel Attack on Graphics Processing Units. - Xin Wang 056; Wei Zhang 002 (NCS, 2019)

Packing Narrow-Width Operands to Improve Energy Efficiency of General-Purpose GPU Computing. - Xin Wang 056; Wei Zhang 002 (HPEC, 2020)

pacSCA: A Profiling-Assisted Correlation-based Side-Channel Attack on GPUs. - Xin Wang 056; Wei Zhang 002 (ICCD, 2020)