A wideband CMOS variable-gain low noise amplifier with novel attenuator. - Tao Cheng; Tao Yang; Xin Wang 130; Zhangwen Tang (ASICON, 2013)

A Fully-Integrated 25Gb/s Low-Noise TIA+CDR Optical Receiver designed in 40nm-CMOS. - Juncheng Wang; Xuefeng Chen 004; Shang Hu; Yaxin Cai; Rui Bai 001; Xin Wang 130; Yuanxi Zhang; Shenglong Zhuo; Chang Liu; Bozhi Yin; Jianxu Ma; Hao Yan; et al. (A-SSCC, 2018)

A 50Gb/s PAM-4 Retimer-CDR + VCSEL Driver with Asymmetric Pulsed Pre-Emphasis Integrated into a Single CMOS Die. - Shang Hu; Tingyu Yao; Bozhi Yin; Chunyu Song; Lei Zhao; Juncheng Wang; Lei Wang 187; Rui Bai 001; Xin Wang 130; Tao Xia; Yi Peng; Binbin Yao; et al. (OFC, 2019)

A Fully Integrated 25 Gb/s Low-Noise TIA+CDR Optical Receiver Designed in 40-nm-CMOS. - Juncheng Wang; Quan Pan 002; Yajie Qin; Xuefeng Chen 004; Shang Hu; Rui Bai 001; Xin Wang 130; Yaxin Cai; Tao Xia; Yuanxi Zhang; Jianxu Ma; Nan Qi; et al. (IEEE Trans. Circuits Syst. II Express Briefs, 2019)

PAM-X™: A 25Gb/s-PAM4 Optical Transceiver Chipset for 5G Optical Front-Haul. - Xin Wang 130; Yi Peng; Yuanxi Zhang; Tao Xia; Yifan Wu 009; Juncheng Wang; Lei Wang 187; Liujia Song; Lei Zhao; Shenglong Zhuo; Quan Pan 002; Xuefeng Chen 004; et al. (OFC, 2020)

Co-designed electro-optical integrated frontend circuits for high speed transceivers. - Johan Bauwelinck; Marijn Verbeke; Joris Lambrecht; Michael Vanhoecke; Laurens Breyne; Gertjan Coudyzer; Jakob Declercq; Bart Moeneclaey; R. Ahmed; Nishant Singh; Cedric Bruynsteen; Cheng Wang; et al. (OECC/PSC, 2022)

Photonic Network-on-Wafer for Multichiplet GPUs. - Shiqing Zhang; Ziyue Zhang; Mahmood Naderan-Tahan; Hossein SeyyedAghaei; Xin Wang 130; He Li; Senbiao Qin; Didier Colle; Guy Torfs; Mario Pickavet; Johan Bauwelinck; Günther Roelkens; et al. (IEEE Micro, 2023)