Voltage-mode ultra-low power four quadrant multiplier using subthreshold PMOS. - Xin Xin 005; Jueping Cai; Ruilian Xie; Peng Wang (IEICE Electron. Express, 2017)

Low-Cost Adaptive and Fault-Tolerant Routing Method for 2D Network-on-Chip. - Ruilian Xie; Jueping Cai; Xin Xin 005; Bo Yang (IEICE Trans. Inf. Syst., 2017)

MCAR: Non-local adaptive Network-on-Chip routing with message propagation of congestion information. - Ruilian Xie; Jueping Cai; Xin Xin 005; Bo Yang (Microprocess. Microsystems, 2017)

A 750-nW 1-MHz 9-tap analog finite impulse response filter for wireless senor network chip. - Xin Xin 005; Jueping Cai; Ruilian Xie; Peng Wang (Microelectron. J., 2018)

LBFT: a fault-tolerant routing algorithm for load-balancing network-on-chip based on odd-even turn model. - Ruilian Xie; Jueping Cai; Xin Xin 005; Bo Yang (J. Supercomput., 2018)

A 0.4-V 10-bit 10-KS/s SAR ADC in 0.18 μm CMOS for low energy wireless senor network chip. - Xin Xin 005; Jueping Cai; Teng Teng Chen; Qi Di Yang (Microelectron. J., 2019)

A Power-Efficient 13-Tap FIR filter and an IIR Filter Embedded in a 10-bit SAR ADC. - Xin Xin 005; Linxiao Shen; Xiyuan Tang; Yi Shen 007; Jueping Cai; Nan Sun 001 (A-SSCC, 2020)

A 10-Bit 100-MS/s SAR ADC with Always-on Reference Ripple Cancellation. - Xiyuan Tang; Yi Shen 007; Xin Xin 005; Shubin Liu; Jueping Cai; Zhangming Zhu; Nan Sun 001 (VLSI Circuits, 2020)

A 10-bit 120-MS/s SAR ADC With Reference Ripple Cancellation Technique. - Yi Shen 007; Xiyuan Tang; Linxiao Shen; Wenda Zhao; Xin Xin 005; Shubin Liu; Zhangming Zhu; Visvesh Sathe 001; Nan Sun 001 (IEEE J. Solid State Circuits, 2020)

A 10-bit SAR ADC with adaptive VCO-based comparator for sensor chip. - Xin Xin 005; Yuanhao Hu; Xingyuan Tong (ICTA, 2021)

A 1st-order noise shaping SAR ADC with dual-capacitor merge-and-split switching scheme for sensor chip. - Xin Xin 005; Shimei Zhao; Yuanhao Hu; Xingyuan Tong (ICTA, 2021)

A three-stage OTA with hybrid active miller enhanced compensation technique for large to heavy load applications. - Siwan Dong; Cong Liu; Xin Xin 005; Xingyuan Tong (Microelectron. J., 2021)

A chaos-based true random number generator based on OTA sharing and non-flipped folded Bernoulli mapping for high-precision ADC calibration. - Siwan Dong; Yarong Wang; Xin Xin 005; Xingyuan Tong (Microelectron. J., 2021)

High Energy Efficiency and Linearity Switching Scheme Without Reset Energy for SAR ADC. - Xingyuan Tong; Shimei Zhao; Xin Xin 005 (Circuits Syst. Signal Process., 2022)

A 0.6-V, 1.56-nW, 5.87-ppm/°C, 0.23%/V CMOS-Only Subthreshold Voltage Reference with the Threshold Voltage Difference. - Xin Xin 005; Yuanhao Hu; Jueping Cai; Siwan Dong; Xingyuan Tong (Circuits Syst. Signal Process., 2022)

A 14-bit 1.2-V low power SAR ADC with digital background calibration in 0.18 μm CMOS. - Xingyuan Tong; Hui Guo; Xin Xin 005; Chang Zhang; Yuanhao Hu (Microelectron. J., 2022)

A 0.6-V 12-bit 13.2-fJ/conversion-step SAR ADC with time-domain VCDL-based comparator and metastability immunity technique. - Xingyuan Tong; Wei Jin; Chunming Zhang; Xin Xin 005; Siwan Dong; Qinqin Li (Microelectron. J., 2022)

A 200 Hz-to-10 kHz bandwidth 11.83-ENOB level-crossing ADC with single continuous-time comparator. - Xingyuan Tong; Yuming Wei; Wen Mao; Xin Xin 005 (Microelectron. J., 2022)

A 10-bit 100-MS/s SAR ADC With Always-On Reference Ripple Cancellation. - Yi Shen 007; Xiyuan Tang; Xin Xin 005; Shubin Liu; Zhangming Zhu; Nan Sun 001 (IEEE Trans. Circuits Syst. I Regul. Pap., 2022)

A Power-Efficient 13-Tap FIR Filter and an IIR Filter Embedded in a 10-Bit SAR ADC. - Xin Xin 005; Linxiao Shen; Xiyuan Tang; Yi Shen 007; Jueping Cai; Xingyuan Tong; Nan Sun 001 (IEEE Trans. Circuits Syst. I Regul. Pap., 2023)

A 14-bit 1-MS/s SAR ADC with a segmented capacitor array and background mismatch calibration for IoT sensing applications. - Chang Zhang; Xin Xin 005; Xingyuan Tong (Microelectron. J., 2023)

An 11-bit Nyquist SAR-VCO Hybrid ADC with a Reused Ring-VCO for Power Reduction. - Xin Xin 005; Chang Zhang; Xingyuan Tong (Circuits Syst. Signal Process., 2024)

A high power supply rejection LDO with ripple neutralization technique for Sigma-Delta D/A converter. - Xingyuan Tong; Zongxiang Liu; Yinbo Li; Xin Xin 005 (Microelectron. J., 2025)

An NMOS LDO with input pre-regulation technique for Sigma-Delta DAC with wide supply range. - Xingyuan Tong; Yinbo Li; Xin Xin 005 (Microelectron. J., 2025)

A 1st-Order NS-SAR⋅ADC With DCMS Switching Scheme for Smart Consumer Electronics Device. - Xin Xin 005; Yuchen Li; Shimei Zhao; Dingyu Sun; Xingyuan Tong (IEEE Trans. Consumer Electron., 2025)