ROC: DRAM-based Processing with Reduced Operation Cycles. - Xin Xin 008; Youtao Zhang; Jun Yang 002 (DAC, 2019)

Reducing DRAM Access Latency via Helper Rows. - Xin Xin 008; Youtao Zhang; Jun Yang 002 (DAC, 2020)

ELP2IM: Efficient and Low Power Bitwise Operation Processing in DRAM. - Xin Xin 008; Youtao Zhang; Jun Yang 002 (HPCA, 2020)

ParaBit: Processing Parallel Bitwise Operations in NAND Flash Memory based SSDs. - Congming Gao; Xin Xin 008; Youyou Lu; Youtao Zhang; Jun Yang 002; Jiwu Shu (MICRO, 2021)

SAM: Accelerating Strided Memory Accesses. - Xin Xin 008; Yanan Guo 002; Youtao Zhang; Jun Yang 002 (MICRO, 2021)

Architecting DDR5 DRAM caches for non-volatile memory systems. - Xin Xin 008; Wanyi Zhu; Li Zhao (DAC, 2022)

Leaky Way: A Conflict-Based Cache Covert Channel Bypassing Set Associativity. - Yanan Guo 002; Xin Xin 008; Youtao Zhang; Jun Yang 002 (MICRO, 2022)

Uncore Encore: Covert Channels Exploiting Uncore Frequency Scaling. - Yanan Guo 002; Dingyuan Cao 002; Xin Xin 008; Youtao Zhang; Jun Yang 002 (MICRO, 2023)

Addition is Most You Need: Efficient Floating-Point SRAM Compute-in-Memory by Harnessing Mantissa Addition. - Weidong Cao 001; Jian Gao; Xin Xin 008; Xuan Zhang 001 (DAC, 2024)

LightML: A Photonic Accelerator for Efficient General Purpose Machine Learning. - Liang Liu; Sadra Rahimi Kari; Xin Xin 008; Nathan Youngblood; Youtao Zhang; Jun Yang 002 (ISCA, 2025)