C-brain: a deep learning accelerator that tames the diversity of CNNs through adaptive data-level parallelization. - Lili Song; Ying Wang 001; Yinhe Han 001; Xin Zhao 044; Bosheng Liu; Xiaowei Li 001 (DAC, 2016)

Towards Intelligent-Edge Computing: Application, Architecture, Circuit, and Device Perspective. - Liang Chang 002; Xin Zhao 044; Chenglong Li; Siqi Yang 002; Shuisheng Lin; Jun Zhou 017 (ICTA, 2021)

Trend of Emerging Non-Volatile Memory for AI Processor. - Liang Chang 002; Chenglong Li; Xin Zhao 044; Zixuan Zhu 001; Yi Tong; Shuisheng Lin; Jun Zhou 017 (ISOCC, 2021)

IPOCIM: Artificial Intelligent Processor with Adaptive Ping-pong Computing-in-Memory Architecture. - Liang Chang 002; Chenglong Li; Xin Zhao 044; Shuisheng Lin; Jun Zhou 017 (ICTA, 2022)

TDPRO: Ultra-low Power ECG Processor with High-Precision Time-Domain Computing Engine. - Liang Chang 002; Siqi Yang 002; Huinan Wang; Jianbo Xiao; Xin Zhao 044; Shuisheng Lin; Jun Zhou 017 (ISCAS, 2022)

ReverSearch: Search-based energy-efficient Processing-in-Memory Architecture. - Weihang Li; Liang Chang 002; Jiajing Fan; Xin Zhao 044; Hengtan Zhang; Shuisheng Lin; Jun Zhou 017 (ISCAS, 2022)

SCA: Search-Based Computing Hardware Architecture with Precision Scalable and Computation Reconfigurable Scheme. - Liang Chang 002; Xin Zhao 044; Jun Zhou 017 (Sensors, 2022)

HDSuper: Algorithm-Hardware Co-design for Light-weight High-quality Super-Resolution Accelerator. - Liang Chang 002; Xin Zhao 044; Dongqi Fan; Zhicheng Hu; Jun Zhou 017 (DAC, 2023)

ADAS: A High Computational Utilization Dynamic Reconfigurable Hardware Accelerator for Super Resolution. - Liang Chang 002; Xin Zhao 044; Jun Zhou 017 (ACM Trans. Reconfigurable Technol. Syst., 2023)

A RRAM-based High Energy-efficient Accelerator Supporting Multimodal Tasks for Virtual Reality Wearable Devices. - Xin Zhao 044; Zhicheng Hu; Zilong Guo; Haodong Fan; Xi Yang; Jing Zhou; Liang Chang 002 (DAC, 2024)

SuperHCA: A Super-Resolution Accelerator with Sparsity-Aware Heterogeneous Core Architecture. - Zhicheng Hu; Jiahao Zeng; Xin Zhao 044; Liang Zhou; Liang Chang 002 (ISCAS, 2024)

USR-LUT: A High-Efficient Universal Super Resolution Accelerator with Lookup Table. - Xin Zhao 044; Zhicheng Hu; Liang Chang 002 (ISCAS, 2024)

LIR: A Lightweight Baseline for Image Restoration. - Dongqi Fan; Ting Yue; Xin Zhao 044; Liang Chang 002 (CoRR, 2024)

IRConStyle: Image Restoration Framework Using Contrastive Learning and Style Transfer. - Dongqi Fan; Xin Zhao 044; Liang Chang 002 (CoRR, 2024)

IPOCIM: Artificial Intelligent Architecture Design Space Exploration With Scalable Ping-Pong Computing-in-Memory Macro. - Liang Chang 002; Xin Zhao 044; Ting Yue; Xi Yang; Chenglong Li; Shuisheng Lin; Jun Zhou 017 (IEEE Trans. Very Large Scale Integr. Syst., 2024)

HDSuper: High-Quality and High Computational Utilization Edge Super-Resolution Accelerator With Hardware-Algorithm Co-Design Techniques. - Xin Zhao 044; Liang Chang 002; Dongqi Fan; Zhicheng Hu; Ting Yue; Fengbin Tu; Jun Zhou 017 (IEEE Trans. Circuits Syst. I Regul. Pap., 2024)

General Purpose Deep Learning Accelerator Based on Bit Interleaving. - Liang Chang 002; Hang Lu; Chenglong Li; Xin Zhao 044; Zhicheng Hu; Jun Zhou 017; Xiaowei Li 001 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2024)

SuperHCA: An Efficient Deep-Learning Edge Super-Resolution Accelerator With Sparsity-Aware Heterogeneous Core Architecture. - Zhicheng Hu; Jiahao Zeng; Xin Zhao 044; Liang Zhou; Liang Chang 002 (IEEE Trans. Circuits Syst. I Regul. Pap., 2024)

PIPECIM: Energy-Efficient Pipelined Computing-in-Memory Computation Engine With Sparsity-Aware Technique. - Yuanbo Wang; Liang Chang 002; Jingke Wang; Pan Zhao; Jiahao Zeng; Xin Zhao 044; Wuyang Hao; Liang Zhou; Haining Tan; Yinhe Han 001; Jun Zhou 017 (IEEE Trans. Very Large Scale Integr. Syst., 2025)

Trident: The Acceleration Architecture for High-Performance Private Set Intersection. - Jinkai Zhang; Yinghao Yang; Zhe Zhou; Zhicheng Hu; Xin Zhao 044; Liang Chang 002; Hang Lu; Xiaowei Li 001 (IEEE Trans. Computers, 2025)