The design and implementation of the multi-screen interaction service architecture for the Real-Time streaming media. - Xinfeng Xie; Zhongqing Yu; Kaixi Wang (ICNC, 2013)

Communication Optimization on GPU: A Case Study of Sequence Alignment Algorithms. - Jie Wang 022; Xinfeng Xie; Jason Cong (IPDPS, 2017)

HitNet: Hybrid Ternary Recurrent Neural Network. - Peiqi Wang 001; Xinfeng Xie; Lei Deng 003; Guoqi Li; Dongsheng Wang 002; Yuan Xie 001 (NeurIPS, 2018)

Exploiting Sparsity to Accelerate Fully Connected Layers of CNN-Based Applications on Mobile SoCs. - Xinfeng Xie; Dayou Du; Qian Li 027; Yun Liang 001; Wai Teng Tang; Zhongliang Ong; Mian Lu; Huynh Phung Huynh; Rick Siow Mong Goh (ACM Trans. Embed. Comput. Syst., 2018)

FPSA: A Full System Stack Solution for Reconfigurable ReRAM-based NN Accelerator Architecture. - Yu Ji 002; Youyang Zhang; Xinfeng Xie; Shuangchen Li; Peiqi Wang 001; Xing Hu 001; Youhui Zhang; Yuan Xie 001 (ASPLOS, 2019)

Memory-Bound Proof-of-Work Acceleration for Blockchain Applications. - Kun Wu 002; Guohao Dai; Xing Hu 001; Shuangchen Li; Xinfeng Xie; Yu Wang 002; Yuan Xie 001 (DAC, 2019)

Analysis and Optimization of the Memory Hierarchy for Graph Processing Workloads. - Abanti Basak; Shuangchen Li; Xing Hu 001; Sang Min Oh; Xinfeng Xie; Li Zhao; Xiaowei Jiang; Yuan Xie 001 (HPCA, 2019)

NNBench-X: Benchmarking and Understanding Neural Network Workloads for Accelerator Designs. - Xinfeng Xie; Xing Hu 001; Peng Gu; Shuangchen Li; Yu Ji 002; Yuan Xie 001 (IEEE Comput. Archit. Lett., 2019)

QGAN: Quantized Generative Adversarial Networks. - Peiqi Wang 001; Dongsheng Wang 002; Yu Ji 002; Xinfeng Xie; Haoxuan Song; XuXin Liu; Yongqiang Lyu 001; Yuan Xie 001 (CoRR, 2019)

Neural Network Model Extraction Attacks in Edge Devices by Hearing Architectural Hints. - Xing Hu 001; Ling Liang; Lei Deng 003; Shuangchen Li; Xinfeng Xie; Yu Ji 002; Yufei Ding 001; Chang Liu 021; Timothy Sherwood; Yuan Xie 001 (CoRR, 2019)

DeepSniffer: A DNN Model Extraction Framework Based on Learning Architectural Hints. - Xing Hu 001; Ling Liang; Shuangchen Li; Lei Deng 003; Pengfei Zuo; Yu Ji 002; Xinfeng Xie; Yufei Ding 001; Chang Liu 021; Timothy Sherwood; Yuan Xie 001 (ASPLOS, 2020)

iPIM: Programmable In-Memory Image Processing Accelerator Using Near-Bank Architecture. - Peng Gu; Xinfeng Xie; Yufei Ding 001; Guoyang Chen; Weifeng Zhang 003; Dimin Niu; Yuan Xie 001 (ISCA, 2020)

SAGA-Bench: Software and Hardware Characterization of Streaming Graph Analytics Workloads. - Abanti Basak; Jilan Lin; Ryan Lorica; Xinfeng Xie; Zeshan Chishti; Alaa R. Alameldeen; Yuan Xie 001 (ISPASS, 2020)

SEALing Neural Network Models in Secure Deep Learning Accelerators. - Pengfei Zuo; Yu Hua 001; Ling Liang; Xinfeng Xie; Xing Hu 001; Yuan Xie 001 (CoRR, 2020)

Rubik: A Hierarchical Architecture for Efficient Graph Learning. - Xiaobing Chen; Yuke Wang; Xinfeng Xie; Xing Hu 001; Abanti Basak; Ling Liang; Mingyu Yan; Lei Deng 003; Yufei Ding 001; Zidong Du; Yunji Chen; Yuan Xie 001 (CoRR, 2020)

NNBench-X: A Benchmarking Methodology for Neural Network Accelerator Designs. - Xinfeng Xie; Xing Hu 001; Peng Gu; Shuangchen Li; Yu Ji 002; Yuan Xie 001 (ACM Trans. Archit. Code Optim., 2020)

SEALing Neural Network Models in Encrypted Deep Learning Accelerators. - Pengfei Zuo; Yu Hua 001; Ling Liang; Xinfeng Xie; Xing Hu 001; Yuan Xie 001 (DAC, 2021)

SpaceA: Sparse Matrix Vector Multiplication on Processing-in-Memory Accelerator. - Xinfeng Xie; Zheng Liang 003; Peng Gu; Abanti Basak; Lei Deng 003; Ling Liang; Xing Hu 001; Yuan Xie 001 (HPCA, 2021)

MPU: Towards Bandwidth-abundant SIMT Processor via Near-bank Computing. - Xinfeng Xie; Peng Gu; Yufei Ding 001; Dimin Niu; Hongzhong Zheng; Yuan Xie 001 (CoRR, 2021)

DLUX: A LUT-Based Near-Bank Accelerator for Data Center Deep Learning Training Workloads. - Peng Gu; Xinfeng Xie; Shuangchen Li; Dimin Niu; Hongzhong Zheng; Krishna T. Malladi; Yuan Xie 001 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021)

A Transferable Approach for Partitioning Machine Learning Models on Multi-Chip-Modules. - Xinfeng Xie; Prakash Prabhu; Ulysse Beaugnon; Phitchaya Mangpo Phothilimthana; Sudip Roy 002; Azalia Mirhoseini; Eugene Brevdo; James Laudon; Yanqi Zhou (MLSys, 2022)

MPU-Sim: A Simulator for In-DRAM Near-Bank Processing Architectures. - Xinfeng Xie; Peng Gu; Jiayi Huang 001; Yufei Ding 001; Yuan Xie 001 (IEEE Comput. Archit. Lett., 2022)

Rubik: A Hierarchical Architecture for Efficient Graph Neural Network Training. - Xiaobing Chen; Yuke Wang; Xinfeng Xie; Xing Hu 001; Abanti Basak; Ling Liang; Mingyu Yan; Lei Deng 003; Yufei Ding 001; Zidong Du; Yuan Xie 001 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022)

Efficient In-DRAM Near-Bank Processing for Emerging Parallel Computing Workloads - Xinfeng Xie (2022)

MPU: Memory-centric SIMT Processor via In-DRAM Near-bank Computing. - Xinfeng Xie; Peng Gu; Yufei Ding 001; Dimin Niu; Hongzhong Zheng; Yuan Xie 008 (ACM Trans. Archit. Code Optim., 2023)

CoMERA: Computing- and Memory-Efficient Training via Rank-Adaptive Tensor Optimization. - Zi Yang; Ziyue Liu; Samridhi Choudhary; Xinfeng Xie; Cao Gao; Siegfried Kunzmann; Zheng Zhang (NeurIPS, 2024)

CoMERA: Computing- and Memory-Efficient Training via Rank-Adaptive Tensor Optimization. - Zi Yang; Samridhi Choudhary; Xinfeng Xie; Cao Gao; Siegfried Kunzmann; Zheng Zhang (CoRR, 2024)

Context Parallelism for Scalable Million-Token Inference. - Amy Yang; Jingyi Yang; Aya Ibrahim; Xinfeng Xie; Bangsheng Tang; Grigory Sizov; Jeremy Reizenstein; Jongsoo Park; Jianyu Huang (CoRR, 2024)

Scaling Llama 3 Training with Efficient Parallelism Strategies. - Weiwei Chu; Xinfeng Xie; Jiecao Yu; Jie Wang 022; Amar Phanishayee; Chunqiang Tang; Yuchen Hao; Jianyu Huang; Mustafa Ozdal; Jun Wang; Vedanuj Goswami; Naman Goyal 001; et al. (ISCA, 2025)

WLB-LLM: Workload-Balanced 4D Parallelism for Large Language Model Training. - Zheng Wang 075; Anna Cai; Xinfeng Xie; Zaifeng Pan; Yue Guan; Weiwei Chu; Jie Wang 022; Shikai Li; Jianyu Huang; Chris Cai; Yuchen Hao; Yufei Ding 001 (OSDI, 2025)