Obstacle-Avoiding Octagonal Steiner Tree construction based on Particle Swarm Optimization. - Xing Huang 001; Genggeng Liu; Wenzhong Guo; Guolong Chen (ICNC, 2013)

Fast obstacle-avoiding octilinear steiner minimal tree construction algorithm for VLSI design. - Xing Huang 001; Wenzhong Guo; Guolong Chen (ISQED, 2015)

A PSO-based timing-driven Octilinear Steiner tree algorithm for VLSI routing considering bend reduction. - Genggeng Liu; Wenzhong Guo; Yuzhen Niu; Guolong Chen; Xing Huang 001 (Soft Comput., 2015)

Multilayer Obstacle-Avoiding X-Architecture Steiner Minimal Tree Construction Based on Particle Swarm Optimization. - Genggeng Liu; Xing Huang 001; Wenzhong Guo; Yuzhen Niu; Guolong Chen (IEEE Trans. Cybern., 2015)

Obstacle-Avoiding Algorithm in X-Architecture Based on Discrete Particle Swarm Optimization for VLSI Design. - Xing Huang 001; Genggeng Liu; Wenzhong Guo; Yuzhen Niu; Guolong Chen (ACM Trans. Design Autom. Electr. Syst., 2015)

FH-OAOS: A Fast Four-Step Heuristic for Obstacle-Avoiding Octilinear Steiner Tree Construction. - Xing Huang 001; Wenzhong Guo; Genggeng Liu; Guolong Chen (ACM Trans. Design Autom. Electr. Syst., 2016)

MLXR: multi-layer obstacle-avoiding X-architecture Steiner tree construction for VLSI routing. - Xing Huang 001; Wenzhong Guo; Genggeng Liu; Guolong Chen (Sci. China Inf. Sci., 2017)

MiniControl: Synthesis of Continuous-Flow Microfluidics with Strictly Constrained Control Ports. - Xing Huang 001; Tsung-Yi Ho; Wenzhong Guo; Bing Li 005; Ulf Schlichtmann (DAC, 2019)

Physical Synthesis of Flow-Based Microfluidic Biochips Considering Distributed Channel Storage. - Zhisheng Chen 002; Xing Huang 001; Wenzhong Guo; Bing Li 005; Tsung-Yi Ho; Ulf Schlichtmann (DATE, 2019)

Open-Source Incubation Ecosystem for Digital Microfluidics - Status and Roadmap: Invited Paper. - Xing Huang 001; Chi-Chun Liang; Jia Li; Tsung-Yi Ho; Chang-Jin Kim 001 (ICCAD, 2019)

A Locating Method for Multi-Purposes HTs Based on the Boundary Network. - Chen Dong 002; Fan Zhang 083; Ximeng Liu; Xing Huang 001; Wenzhong Guo; Yang Yang 026 (IEEE Access, 2019)

MiniDelay: Multi-Strategy Timing-Aware Layer Assignment for Advanced Technology Nodes. - Xinghai Zhang; Zhen Zhuang; Genggeng Liu; Xing Huang 001; Wen-Hao Liu 001; Wenzhong Guo; Ting-Chi Wang (DATE, 2020)

HTcatcher: Finite State Machine and Feature Verifcation for Large-scale Neuromorphic Computing Systems. - Guorong He; Chen Dong 002; Xing Huang 001; Wenzhong Guo; Ximeng Liu; Tsung-Yi Ho (ACM Great Lakes Symposium on VLSI, 2020)

MSFRoute: Multi-Stage FPGA Routing for Timing Division Multiplexing Technique. - Zhen Zhuang; Genggeng Liu; Xing Huang 001; Xiaotao Jia; Wen-Hao Liu 001; Wenzhong Guo (ACM Great Lakes Symposium on VLSI, 2020)

PathDriver: A Path-Driven Architectural Synthesis Flow for Continuous-Flow Microfluidic Biochips. - Xing Huang 001; Youlin Pan; Grace Li Zhang; Bing Li 005; Wenzhong Guo; Tsung-Yi Ho; Ulf Schlichtmann (ICCAD, 2020)

A Survey of DMFBs Security: State-of-the-Art Attack and Defense. - Chen Dong 002; Lingqing Liu; Huangda Liu; Wenzhong Guo; Xing Huang 001; Sihuang Lian; Ximeng Liu; Tsung-Yi Ho (ISQED, 2020)

Timing-Driven Flow-Channel Network Construction for Continuous-Flow Microfluidic Biochips. - Xing Huang 001; Tsung-Yi Ho; Krishnendu Chakrabarty; Wenzhong Guo (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020)

Multicontrol: Advanced Control-Logic Synthesis for Flow-Based Microfluidic Biochips. - Ying Zhu 008; Xing Huang 001; Bing Li 005; Tsung-Yi Ho; Qin Wang 005; Hailong Yao; Robert Wille; Ulf Schlichtmann (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020)

An Efficient Programming Framework for Memristor-based Neuromorphic Computing. - Grace Li Zhang; Bing Li 005; Xing Huang 001; Chen Shen; Shuhang Zhang; Florin Burcea; Helmut Graeb; Tsung-Yi Ho; Hai Li 001; Ulf Schlichtmann (DATE, 2021)

ALIFRouter: A Practical Architecture-Level Inter-FPGA Router for Logic Verification. - Zhen Zhuang; Xing Huang 001; Genggeng Liu; Wenzhong Guo; Weikang Qian; Wen-Hao Liu 001 (DATE, 2021)

BigIntegr: One-Pass Architectural Synthesis for Continuous-Flow Microfluidic Lab-on-a-Chip Systems. - Xing Huang 001; Youlin Pan; Zhen Chen; Wenzhong Guo; Robert Wille; Tsung-Yi Ho; Ulf Schlichtmann (ICCAD, 2021)

DCSA: Distributed Channel-Storage Architecture for Flow-Based Microfluidic Biochips. - Chunfeng Liu; Xing Huang 001; Bing Li 005; Hailong Yao; Paul Pop; Tsung-Yi Ho; Ulf Schlichtmann (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021)

NR-Router: Non-Regular Electrode Routing with Optimal Pin Selection for Electrowetting-on-Dielectric Chips. - Hsin-Chuan Huang; Chi-Chun Liang; Qining Wang; Xing Huang 001; Tsung-Yi Ho; Chang-Jin Kim 001 (ASP-DAC, 2022)

LA-SVR: A High-Performance Layer Assignment Algorithm with Slew Violations Reduction. - Lieqiu Jiang; Zepeng Li; Chenpeng Bao; Genggeng Liu; Xing Huang 001; Wen-Hao Liu 001; Ting-Chi Wang (VLSI-SoC, 2022)

SPTA: A Scalable Parallel ILP-Based Track Assignment Algorithm with Two-Stage Partition. - Yidan Jing; Liliang Yang; Zhen Zhuang; Genggeng Liu; Xing Huang 001; Wen-Hao Liu 001; Ting-Chi Wang (VLSI-SoC, 2022)

Computer-aided Design Techniques for Flow-based Microfluidic Lab-on-a-chip Systems. - Xing Huang 001; Tsung-Yi Ho; Wenzhong Guo; Bing Li 005; Krishnendu Chakrabarty; Ulf Schlichtmann (ACM Comput. Surv., 2022)

Design automation for continuous-flow microfluidic biochips: A comprehensive review. - Genggeng Liu; Hongbin Huang; Zhisheng Chen 002; Hongxing Lin; Hui Liu; Xing Huang 001; Wenzhong Guo (Integr., 2022)

Flow-Based Microfluidic Biochips With Distributed Channel Storage: Synthesis, Physical Design, and Wash Optimization. - Xing Huang 001; Wenzhong Guo; Zhisheng Chen 002; Bing Li 005; Tsung-Yi Ho; Ulf Schlichtmann (IEEE Trans. Computers, 2022)

MiniControl 2.0: Co-Synthesis of Flow and Control Layers for Microfluidic Biochips With Strictly Constrained Control Ports. - Xing Huang 001; Tsung-Yi Ho; Zepeng Li; Genggeng Liu; Lu Wang 014; Qingshan Li; Wenzhong Guo; Bing Li 005; Ulf Schlichtmann (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022)

PathDriver+: Enhanced Path-Driven Architecture Design for Flow-Based Microfluidic Biochips. - Xing Huang 001; Youlin Pan; Grace Li Zhang; Bing Li 005; Wenzhong Guo; Tsung-Yi Ho; Ulf Schlichtmann (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022)

Timing-Aware Layer Assignment for Advanced Process Technologies Considering via Pillars. - Genggeng Liu; Xinghai Zhang; Wenzhong Guo; Xing Huang 001; Wen-Hao Liu 001; Kai-Yuan Chao; Ting-Chi Wang (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022)

Contamination-Aware Synthesis for Programmable Microfluidic Devices. - Hui-Chieh Yu; Yu-Huei Lin; Zhiyang Chen 006; Bing Li 005; Xing Huang 001; Ulf Schlichtmann; Tsung-Yi Ho; Hailong Yao (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022)

VirtualSync+: Timing Optimization With Virtual Synchronization. - Grace Li Zhang; Bing Li 005; Xing Huang 001; Xunzhao Yin; Cheng Zhuo; Masanori Hashimoto; Ulf Schlichtmann (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022)

A Survey on Security of Digital Microfluidic Biochips: Technology, Attack, and Defense. - Wenzhong Guo; Sihuang Lian; Chen Dong 002; Zhenyi Chen; Xing Huang 001 (ACM Trans. Design Autom. Electr. Syst., 2022)

Fault-Tolerance-Oriented Physical Design for Fully Programmable Valve Array Biochips. - Genggeng Liu; Yuhan Zhu; Wenzhong Guo; Xing Huang 001 (DAC, 2023)

Design Automation for Continuous-Flow Lab-on-a-Chip Systems: A One-Pass Paradigm. - Xing Huang 001; Youlin Pan; Zhen Chen; Wenzhong Guo; Lu Wang 014; Qingshan Li; Robert Wille; Tsung-Yi Ho; Ulf Schlichtmann (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2023)

Application Mapping and Control-system Design for Microfluidic Biochips with Distributed Channel Storage. - Zhisheng Chen 002; Wenzhong Guo; Genggeng Liu; Xing Huang 001 (ACM Trans. Design Autom. Electr. Syst., 2023)

Enhanced Built-In Self-Diagnosis and Self-Repair Techniques for Daisy-Chain Design in MEDA Digital Microfluidic Biochips. - Ling Zhang; Zipeng Li; Xing Huang 001; Krishnendu Chakrabarty (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2023)

Adaptive Control-Logic Routing for Fully Programmable Valve Array Biochips Using Deep Reinforcement Learning. - Huayang Cai; Genggeng Liu; Wenzhong Guo; Zipeng Li; Tsung-Yi Ho; Xing Huang 001 (ASPDAC, 2024)

Towards Automated Testing of Multiplexers in Fully Programmable Valve Array Biochips. - Genggeng Liu; Yuqin Zeng; Yuhan Zhu; Huayang Cai; Wenzhong Guo; Zipeng Li; Tsung-Yi Ho; Xing Huang 001 (ASPDAC, 2024)

PathDriver-Wash: A Path-Driven Wash Optimization Method for Continuous-Flow Lab-on-a-Chip Systems. - Xing Huang 001; Jiaxuan Wang; Zhiwen Yu 001; Bin Guo 001; Tsung-Yi Ho; Ulf Schlichtmann; Krishnendu Chakrabarty (DATE, 2024)

Washing Optimization Method Based on Deep Reinforcement Learning for Fully Programmable Valve Array Biochips. - Junqian Huang; Yuhan Zhu; Xing Huang 001; Genggeng Liu (ACM Great Lakes Symposium on VLSI, 2024)

Error Recovery Method Based on Deep Reinforcement Learning for Fully Programmable Valve Array Biochips. - Zhenyuan Wu; Yuhan Zhu; Xing Huang 001; Genggeng Liu (ACM Great Lakes Symposium on VLSI, 2024)

Anomaly Detection Method based on Discrete Particle Swarm Optimization for Continuous-Flow Microfluidic Biochips. - Yangjie Wu; Yuhan Zhu; Genggeng Liu; Xing Huang 001 (ACM Great Lakes Symposium on VLSI, 2024)

Timing-Driven High-Level Synthesis for Continuous-Flow Microfluidic Biochips. - Zhengyang Ye; Zhisheng Chen 002; Youlin Pan; Genggeng Liu; Wenzhong Guo; Tsung-Yi Ho; Xing Huang 001 (ISQED, 2024)

Physical design for microfluidic biochips considering actual volume management and channel storage. - Genggeng Liu; Zhengyang Chen; Zhisheng Chen 002; Bowen Liu; Yu Zhang; Xing Huang 001 (Integr., 2024)

Capacity-Aware Wash Optimization with Dynamic Fluid Scheduling and Channel Storage for Continuous-Flow Microfluidic Biochips. - Zhisheng Chen 002; Xu Hu; Wenzhong Guo; Genggeng Liu; Jiaxuan Wang; Tsung-Yi Ho; Xing Huang 001 (ACM Trans. Design Autom. Electr. Syst., 2024)

Control-Logic Synthesis of Fully Programmable Valve Array Using Reinforcement Learning. - Xing Huang 001; Huayang Cai; Wenzhong Guo; Genggeng Liu; Tsung-Yi Ho; Krishnendu Chakrabarty; Ulf Schlichtmann (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2024)

Timing-Driven Obstacle-Avoiding X-Architecture Steiner Minimum Tree Algorithm With Slack Constraints. - Yuhan Zhu; Genggeng Liu; Ren Lu; Xing Huang 001; Min Gan; Wenzhong Guo (IEEE Trans. Syst. Man Cybern. Syst., 2024)

NR-Router+: Enhanced Non-Regular Electrode Routing With Optimal Pin Selection for Electrowetting-on-Dielectric Chips. - Youlin Pan; Genggeng Liu; Xing Huang 001; Zipeng Li; Hsin-Chuan Huang; Chi-Chun Liang; Qining Wang; Chang-Jin Kim 001; Tsung-Yi Ho (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2024)

A Robust Multilayer X-Architecture Global Routing System Based on Particle Swarm Optimization. - Genggeng Liu; Yuhan Zhu; Zhen Zhuang; Zhenyu Pei; Min Gan; Xing Huang 001; Wenzhong Guo (IEEE Trans. Syst. Man Cybern. Syst., 2024)

Timing-Driven Application Mapping for Continuous-Flow Microfluidic Biochips. - Xinyue Jiao; Youlin Pan; Bowen Liu; Zhen Chen; Genggeng Liu; Xing Huang 001 (ACM Great Lakes Symposium on VLSI, 2025)

Application Mapping Method based on Particle Swarm Optimization for Continuous-Flow Microfluidic Biochips. - Hongjin Su; Zhisheng Chen 002; Bowen Liu; Zhen Chen; Genggeng Liu; Xing Huang 001 (ACM Great Lakes Symposium on VLSI, 2025)

SDCLR: Scalable Dual Control-Layer Routing for continuous-flow microfluidic biochips with minimized control ports. - Zhisheng Chen 002; Hongjin Su; Bohan Dong; Genggeng Liu; Xing Huang 001 (Integr., 2025)

SPTA 2.0: Enhanced Scalable Parallel Track Assignment Algorithm with Two-Stage Partition Considering Timing Delay. - Huayang Cai; Pengcheng Huang; Genggeng Liu; Xing Huang 001; Yidan Jing; Wenhao Liu 001; Ting-Chi Wang (ACM Trans. Design Autom. Electr. Syst., 2025)

A Unified Deep Reinforcement Learning Approach for Constructing Rectilinear and Octilinear Steiner Minimum Tree. - Zhenkun Lin; Genggeng Liu; Xing Huang 001; Yibo Lin; Jixin Zhang; Wen-Hao Liu 001; Ting-Chi Wang (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2025)

FTCD: Fault-Tolerant Co-Design of Flow and Control Layers for Fully Programmable Valve Array Biochips. - Yuhan Zhu; Genggeng Liu; Wenzhong Guo; Xing Huang 001 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2025)