16- and 64-Point Analog Computing of FFT with Improved Performance and Efficiency. - Jingjing Li 001; Xingchen Chao; Qiang Li 021 (PRIME, 2022)

A 128-GS/s Timing-Robust Sampling Architecture Exploiting Analog FFT. - Xingchen Chao; Qiang Li 021 (ISCAS, 2023)

A Low-Noise and Settling-Enhanced Switched-Capacitor Amplifier With Correlated Level Shifting and Bandwidth Switching. - Feng Tai; Ziqin Nie; Yinhao Wang; Xingchen Chao; Qiang Li 021 (ISCAS, 2023)

An 8T SRAM Based Digital Compute-In-Memory Macro For Multiply-And-Accumulate Accelerating. - Zilin Wang; Hongyang Luo; ZeYang Peng; Xingchen Chao; Yajuan He (ISCAS, 2023)

131TOPS/W 8b ACIM Exploiting Weight-Embedded Auto-Accumulation and Supporting Symmetric Quantization Networks. - Wei He; Puvi Bai; Hongyang Luo; Zhenghao Jin; Han Wu; Junyi Zhang; Xingchen Chao; Haiqi Liu; Yajuan He; Qiang Li 021 (CICC, 2024)

A Timing-Robust 10b 13GS/s ADC with Analog Fourier Transform Based Frequency Interleaving. - Xingchen Chao; Yunqiang Xu; Qiang Yu; Zheng Zhu; Sanfeng Zhang; Qiang Li 021 (CICC, 2025)