A General Pattern-Based Dynamic Compilation Framework for Coarse-Grained Reconfigurable Architectures. - Xingchen Man; Leibo Liu; Jianfeng Zhu 001; Shaojun Wei (DAC, 2019)

Pattern-Based Dynamic Compilation System for CGRAs With Online Configuration Transformation. - Leibo Liu; Xingchen Man; Jianfeng Zhu 001; Shouyi Yin; Shaojun Wei (IEEE Trans. Parallel Distributed Syst., 2020)

CaSMap: agile mapper for reconfigurable spatial architectures by automatically clustering intermediate representations and scattering mapping process. - Xingchen Man; Jianfeng Zhu 001; Guihuan Song; Shouyi Yin; Shaojun Wei; Leibo Liu (ISCA, 2022)

Dynamic-II Pipeline: Compiling Loops With Irregular Branches on Static-Scheduling CGRA. - Baofen Yuan; Jianfeng Zhu 001; Xingchen Man; Zijiao Ma; Shouyi Yin; Shaojun Wei; Leibo Liu (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022)

MapZero: Mapping for Coarse-grained Reconfigurable Architectures with Reinforcement Learning and Monte-Carlo Tree Search. - Xiangyu Kong; Yi Huang 036; Jianfeng Zhu 001; Xingchen Man; Yang Liu 326; Chunyang Feng; Pengfei Gou; Minggui Tang; Shaojun Wei; Leibo Liu (ISCA, 2023)

M2STaR: A Multimode Spatio-Temporal Redundancy Design for Fault-Tolerant Coarse-Grained Reconfigurable Architectures. - Xiangyu Kong; Jianfeng Zhu 001; Xingchen Man; Guihuan Song; Yi Huang 036; Chenchen Deng; Pengfei Gou; Shouyi Yin; Shaojun Wei; Leibo Liu (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2023)

Raccoon: Lightweight Support for Comprehensive Control Flows in Reconfigurable Spatial Architectures. - Xiangyu Kong; Yi Huang 036; Longlong Chen; Jianfeng Zhu 001; Liangwei Li; Xingchen Man; Mingyu Gao 001; Shaojun Wei; Leibo Liu (IEEE Trans. Parallel Distributed Syst., 2025)