A New Design of a CMOS Vertical Hall Sensor with a Low Offset. - Fei Lyu 002; Shuo Huang; Chaoran Wu; Xingcheng Liang; Pengzhan Zhang; Yuxuan Wang; Hongbing Pan; Yu Wang 161 (Sensors, 2022)

FDM: Fused Double-Multiply Design for Low-Latency and Area- and Power-Efficient Implementation. - Yu Wang 161; Xingcheng Liang; Shuai Niu; Chi Zhang; Fei Lyu 002; Yuanyong Luo (IEEE Trans. Circuits Syst. II Express Briefs, 2024)

Enhancing brain age estimation under uncertainty: A spectral-normalized neural gaussian process approach utilizing 2.5D slicing. - Zeqiang Linli; Xingcheng Liang; Zhenhua Zhang; Kang Hu; Shuixia Guo (NeuroImage, 2025)