Capturing intrinsic parameter fluctuations using the PSP compact model. - Binjie Cheng; Daryoosh Dideban; Negin Moezi; Campbell Millar; Gareth Roy; Xingsheng Wang; Scott Roy; Asen Asenov (DATE, 2010)

Statistical-Variability Compact-Modeling Strategies for BSIM4 and PSP. - Binjie Cheng; Daryoosh Dideban; Negin Moezi; Campbell Millar; Gareth Roy; Xingsheng Wang; Scott Roy; Asen Asenov (IEEE Des. Test Comput., 2010)

New reliability mechanisms in memory design for sub-22nm technologies. - Nivard Aymerich; A. Asenov; Andrew R. Brown; Ramon Canal; Binjie Cheng; Joan Figueras; Antonio González 001; Enric Herrero; S. Markov; Miguel Miranda; Peyman Pouyan; Tanausú Ramírez; et al. (IOLTS, 2011)

Statistical variability in 14-nm node SOI FinFETs and its impact on corresponding 6T-SRAM cell design. - Xingsheng Wang; Binjie Cheng; Andrew R. Brown; Campbell Millar; Asen Asenov (ESSDERC, 2012)

Impact of statistical variability and charge trapping on 14 nm SOI FinFET SRAM cell stability. - Xingsheng Wang; Binjie Cheng; Andrew R. Brown; Campbell Millar; Jente B. Kuang; Sani R. Nassif; Asen Asenov (ESSDERC, 2013)

SRAM device and cell co-design considerations in a 14nm SOI FinFET technology. - Binjie Cheng; Xingsheng Wang; Andrew R. Brown; Jente B. Kuang; Dave Reid; Campbell Millar; Sani R. Nassif; Asen Asenov (ISCAS, 2013)

Statistical Variability and Reliability and the Impact on Corresponding 6T-SRAM Cell Design for a 14-nm Node SOI FinFET Technology. - Xingsheng Wang; Binjie Cheng; Jente B. Kuang; Andrew R. Brown; Campbell Millar; Asen Asenov (IEEE Des. Test, 2013)

Accurate simulations of the interplay between process and statistical variability for nanoscale FinFET-based SRAM cell stability. - Xingsheng Wang; Binjie Cheng; Andrew R. Brown; Campbell Millar; Asen Asenov (ESSDERC, 2014)

Nanowire transistor solutions for 5nm and beyond. - A. Asenov; Yangang Wang; Binjie Cheng; Xingsheng Wang; Plamen Asenov; Talib Al-Ameri; Vihar P. Georgiev (ISQED, 2016)

A Novel General Compact Model Approach for 7nm Technology Node Circuit Optimization from Device Perspective and Beyond. - Qiang Huo; Zhenhua Wu; Weixing Huang; Xingsheng Wang; Geyu Tang; Jiaxin Yao; Yongpan Liu; Feng Zhang 014; Ling Li 013; Ming Liu 022 (CoRR, 2019)

Electrostatic Characteristics Analysis of Ferroelectric Tunneling Junctions with Different Structures. - Chengxu Wang; Hao Yu; Xiangshui Miao; Xingsheng Wang (ICTA, 2020)

A TCAD-based Study of NDR Effect in NC-FinFET. - Hao Yu; Chengxu Wang; Xiangshui Miao; Xingsheng Wang (ICTA, 2020)

Invited Paper: A Memristor-Based Stateful Majority-Inverter Graph Logic and 1-Bit Full Adder for In-Memory Computing Systems. - Zhouchao Gan; Dongdong Zhang; Yinghao Ma; Chenyu Zhang; Xiangshui Miao; Xingsheng Wang (ICTA, 2023)

A comprehensive study of device variability of sub-5 nm nanosheet transistors and interplay with quantum confinement variation. - Haowen Luo; Ruihan Li; Xiangshui Miao; Xingsheng Wang (Sci. China Inf. Sci., 2023)

Modeling and physical mechanism analysis of the effect of a polycrystalline-ferroelectric gate on FE-FinFETs. - Chengxu Wang; Hao Yu; Yichen Wang; Zichong Zhang; Xiangshui Miao; Xingsheng Wang (Sci. China Inf. Sci., 2023)

Multi-order Differential Neural Network for TCAD Simulation of the Semiconductor Devices. - Zifei Cai; Anaoxue Huang; Yifeng Xiong; Dejiang Mu; Xiangshui Miao; Xingsheng Wang (DAC, 2024)

Design Technology Co-Optimization for Memristor Self-Write Termination Circuits. - Fan Yang; Nan Li; Juncheng Huang; Qingjie Wang; Xiangshui Miao; Xingsheng Wang (ICTA, 2024)

Efficient implementation of majority-inverter graph logic and arithmetic functions with memristor arrays. - Zhouchao Gan; Dongdong Zhang; Chenyu Zhang; Yinghao Ma; Xiangshui Miao; Xingsheng Wang (Sci. China Inf. Sci., 2024)

iPREFER: An Intelligent Parameter Extractor based on Features for BSIM-CMG Models. - Zhiliang Peng; Yicheng Wang; Zhengwu Yuan; Xingsheng Wang (CoRR, 2024)

Multi-Level RTN with Certain Regularities in Oxide-RRAM: Experiments, Defect Dynamics and 3D Multi-Physics Modeling. - Dejiang Mu; Pan Liu; Zijian Zhou; Zifei Cai; Jian Zhang; Kanhao Xue; Zhigang Ji; Xiangshui Miao; Xingsheng Wang (IRPS, 2025)

A Novel Memristor-Based Majority Logic and Efficient Approximate Full Adder for Image Processing. - Zhouchao Gan; Yifeng Xiong; Fan Yang; Mengjie Li; Xiangshui Miao; Xingsheng Wang (ISCAS, 2025)

ReBA: A Hybrid Sparse Reconfigurable Butterfly Accelerator for Solving Partial Differential Equations via Hardware and Algorithm Co-Design. - Pinfeng Jiang; Letian Wang; Yilong Fang; Yi Wang; Mingde Zhu; Xiangshui Miao; Xingsheng Wang (ISCAS, 2025)

Optimizing hardware-software co-design based on non-ideality in memristor crossbars for in-memory computing. - Pinfeng Jiang; Danzhe Song; Menghua Huang; Fan Yang; Letian Wang; Pan Liu; Xiangshui Miao; Xingsheng Wang (Sci. China Inf. Sci., 2025)

ISARA: An Island-Style Systolic Array Reconfigurable Accelerator Based on Memristors for Deep Neural Networks. - Fan Yang; Nan Li; Letian Wang; Pinfeng Jiang; Xiangshui Miao; Xingsheng Wang (IEEE Trans. Very Large Scale Integr. Syst., 2025)