Exploiting parallelism of imperfect nested loops with sibling inner loops on coarse-grained reconfigurable architectures. - Xinhan Lin; Shouyi Yin; Leibo Liu; Shaojun Wei (ASP-DAC, 2016)

Exploiting Parallelism of Imperfect Nested Loops on Coarse-Grained Reconfigurable Architectures. - Shouyi Yin; Xinhan Lin; Leibo Liu; Shaojun Wei (IEEE Trans. Parallel Distributed Syst., 2016)

Learning Convolutional Neural Networks for Data-Flow Graph Mapping on Spatial Programmable Architectures (Abstract Only). - Shouyi Yin; Dajiang Liu; Lifeng Sun; Xinhan Lin; Leibo Liu; Shaojun Wei (FPGA, 2017)

LCP: a layer clusters paralleling mapping method for accelerating inception and residual networks on FPGA. - Xinhan Lin; Shouyi Yin; Fengbin Tu; Leibo Liu; Xiangyu Li; Shaojun Wei (DAC, 2018)

A High Throughput Acceleration for Hybrid Neural Networks With Efficient Resource Management on FPGA. - Shouyi Yin; Shibin Tang; Xinhan Lin; Peng Ouyang; Fengbin Tu; Leibo Liu; Shaojun Wei (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2019)

Parana: A Parallel Neural Architecture Considering Thermal Problem of 3D Stacked Memory. - Shouyi Yin; Shibin Tang; Xinhan Lin; Peng Ouyang; Fengbin Tu; Leibo Liu; Jishen Zhao; Cong Xu 002; Shuangchen Li; Yuan Xie 001; Shaojun Wei (IEEE Trans. Parallel Distributed Syst., 2019)

ADROIT: An Adaptive Dynamic Refresh Optimization Framework for DRAM Energy Saving In DNN Training. - Xinhan Lin; Liang Sun; Fengbin Tu; Leibo Liu; Xiangyu Li; Shaojun Wei; Shouyi Yin (DAC, 2021)

A 28nm 276.55TFLOPS/W Sparse Deep-Neural-Network Training Processor with Implicit Redundancy Speculation and Batch Normalization Reformulation. - Yang Wang 089; Yubin Qin; Dazheng Deng; Jingchuan Wei; Tianbao Chen; Xinhan Lin; Leibo Liu; Shaojun Wei; Shouyi Yin (VLSI Circuits, 2021)

Trainer: An Energy-Efficient Edge-Device Training Processor Supporting Dynamic Weight Pruning. - Yang Wang 089; Yubin Qin; Dazheng Deng; Jingchuan Wei; Tianbao Chen; Xinhan Lin; Leibo Liu; Shaojun Wei; Shouyi Yin (IEEE J. Solid State Circuits, 2022)

Wafer-scale Computing: Advancements, Challenges, and Future Perspectives. - Yang Hu 001; Xinhan Lin; Huizheng Wang; Zhen He; Xingmao Yu; Jiahao Zhang; Qize Yang; Zheng Xu; Sihan Guan; Jiahao Fang; Haoran Shang; Xinru Tang; et al. (CoRR, 2023)

Reconfigurability, Why It Matters in AI Tasks Processing: A Survey of Reconfigurable AI Chips. - Shaojun Wei; Xinhan Lin; Fengbin Tu; Yang Wang 089; Leibo Liu; Shouyi Yin (IEEE Trans. Circuits Syst. I Regul. Pap., 2023)

Dissect Black Box: Interpreting for Rule-Based Explanations in Unsupervised Anomaly Detection. - Yu Zhang; Ruoyu Li; Nengwu Wu; Qing Li; Xinhan Lin; Yang Hu; Tao Li; Yong Jiang (NeurIPS, 2024)

RM-PoT: Reformulating Mathematical Problems and Solving via Program of Thoughts. - Yu Zhang; Shujun Peng; Nengwu Wu; Xinhan Lin; Yang Hu; Jie Tang 001 (CoRR, 2025)