An Ultra-High Energy-Efficient Reconfigurable Processor for Deep Neural Networks with Binary/Ternary Weights in 28NM CMOS. - Shouyi Yin; Peng Ouyang; Jianxun Yang; Tianyi Lu; Xiudong Li; Leibo Liu; Shaojun Wei (VLSI Circuits, 2018)

A 141 UW, 2.46 PJ/Neuron Binarized Convolutional Neural Network Based Self-Learning Speech Recognition Processor in 28NM CMOS. - Shouyi Yin; Peng Ouyang; Shixuan Zheng; Dandan Song; Xiudong Li; Leibo Liu; Shaojun Wei (VLSI Circuits, 2018)

A High Energy Efficient Reconfigurable Hybrid Neural Network Processor for Deep Learning Applications. - Shouyi Yin; Peng Ouyang; Shibin Tang; Fengbin Tu; Xiudong Li; Shixuan Zheng; Tianyi Lu; Jiangyuan Gu; Leibo Liu; Shaojun Wei (IEEE J. Solid State Circuits, 2018)

A 5.1pJ/Neuron 127.3us/Inference RNN-based Speech Recognition Processor using 16 Computing-in-Memory SRAM Macros in 65nm CMOS. - Ruiqi Guo; Yonggang Liu; Shixuan Zheng; Ssu-Yen Wu; Peng Ouyang; Win-San Khwa; Xi Chen; Jia-Jing Chen; Xiudong Li; Leibo Liu; Meng-Fan Chang; Shaojun Wei; et al. (VLSI Circuits, 2019)

An Energy-Efficient Reconfigurable Processor for Binary-and Ternary-Weight Neural Networks With Flexible Data Bit Width. - Shouyi Yin; Peng Ouyang; Jianxun Yang; Tianyi Lu; Xiudong Li; Leibo Liu; Shaojun Wei (IEEE J. Solid State Circuits, 2019)

An Ultra-Low Power Binarized Convolutional Neural Network-Based Speech Recognition Processor With On-Chip Self-Learning. - Shixuan Zheng; Peng Ouyang; Dandan Song; Xiudong Li; Leibo Liu; Shaojun Wei; Shouyi Yin (IEEE Trans. Circuits Syst. I Regul. Pap., 2019)