Vernier ring based pre-bond through silicon vias test in 3D ICs. - Tianming Ni; Mu Nie; Huaguo Liang; Jingchang Bian; Xiumin Xu; Xiangsheng Fang; Zhengfeng Huang; Xiaoqing Wen (IEICE Electron. Express, 2017)

A single event transient detector in SRAM-based FPGAs. - Xiumin Xu; Huaguo Liang; Zhengfeng Huang; Cuiyun Jiang; Yingchun Lu; Aibin Yan; Tianming Ni; Maoxiang Yi (IEICE Electron. Express, 2017)

A highly reliable butterfly PUF in SRAM-based FPGAs. - Xiumin Xu; Huaguo Liang; Zhengfeng Huang; Cuiyun Jiang; Yiming Ouyang; Xiangsheng Fang; Tianming Ni; Maoxiang Yi (IEICE Electron. Express, 2017)

Highly Robust Double Node Upset Resilient Hardened Latch Design. - Huaguo Liang; Xin Li; Zhengfeng Huang; Aibin Yan; Xiumin Xu (IEICE Trans. Electron., 2017)

A Region-Based Through-Silicon via Repair Method for Clustered Faults. - Tianming Ni; Huaguo Liang; Mu Nie; Xiumin Xu; Aibin Yan; Zhengfeng Huang (IEICE Trans. Electron., 2017)

Double-Node-Upset-Resilient Latch Design for Nanoscale CMOS Technology. - Aibin Yan; Zhengfeng Huang; Maoxiang Yi; Xiumin Xu; Yiming Ouyang; Huaguo Liang (IEEE Trans. Very Large Scale Integr. Syst., 2017)

A Low-Cost High-Efficiency True Random Number Generator on FPGAs. - Gaoliang Ma; Huaguo Liang; Liang Yao; Zhengfeng Huang; Maoxiang Yi; Xiumin Xu; Kai Zhou (ATS, 2018)

An All-Digital and Jitter-Quantizing True Random Number Generator in SRAM-Based FPGAs. - Xiumin Xu; Huaguo Liang; Kai Zhou; Gaoliang Ma; Zhengfeng Huang; Maoxiang Yi; Tianming Ni; Yingchun Lu (ATS, 2018)

A High Reliability FPGA Chip Identification Generator Based on PDLs. - Kai Zhou; Huaguo Liang; Yue Jiang; Zhengfeng Huang; Maoxiang Yi; Xiumin Xu; Yao Yao (ATS, 2018)

High-Throughput TRNG Design with Novelty Adjustable TDC Based on STR. - Yongkang Feng; Liang Yao; Hongli Zhou; Minjie Wu; Shuai Xiang; Wanting Sun; Xiumin Xu; Yingchun Lu (ACM Trans. Reconfigurable Technol. Syst., 2025)