Layout-based Single Event Mitigation Techniques for Dynamic Logic Circuits. - Haibin Wang; Mulong Li; Xixi Dai; Shuting Shi; Li Chen 001; Gang Guo (J. Electron. Test., 2016)

A single event upset tolerant latch design. - Haibin Wang; Xixi Dai; Yangsheng Wang; Issam Nofal; Li Cai; Zicai Shen; Wanxiu Sun; Jinshun Bi; Bo Li 051; Gang Guo; Li Chen 001; Sang H. Baeg (Microelectron. Reliab., 2018)

A Single Event Upset Resilient Latch Design with Single Node Upset Immunity. - Xixi Dai; Haibin Wang; Jiamin Chu; Zhi Liu 004; Li Cai; Kang Yan (J. Electron. Test., 2019)

A Layout-Based Rad-Hard DICE Flip-Flop Design. - Haibin Wang; Xixi Dai; Younis Mohammed Younis Ibrahim; Hongwen Sun; Issam Nofal; Li Cai; Gang Guo; Zicai Shen; Li Chen 001 (J. Electron. Test., 2019)