A Two-step SAR ADC with Synchronous DEM Calibration Achieving Up to 15% Power Reduction. - Zhechong Lan; Li Dong 007; Xixin Jing; Liheng Liu; Ken Li; Ziyan Shen; Zhiming Li; Li Geng (APCCAS, 2020)

A 12-Bit 100MS/s SAR ADC with Digital Error Correction and High-Speed LMS-Based Background Calibration. - Zhechong Lan; Li Dong 007; Xixin Jing; Li Geng (ISCAS, 2021)

A 98.1-dB SNDR 188-dB FoMS Noise-Shaping SAR ADC Using Series Connection Capacitors. - Xixin Jing; Zhechong Lan; Bing Zhang 019; Li Dong 007; Youze Xin; Zhuoqi Guo; Zhongming Xue; Li Geng (MWSCAS, 2021)

A 10-bit 20-MS/s SAR DAC achieving 57.9-dB SNDR using insensitive geometry DAC array. - Li Dong 007; Yan Song; Yi Xie; Youze Xin; Ken Li; Xixin Jing; Bing Zhang 019; Xiaoyan Gui; Li Geng (Microelectron. J., 2021)