Bitwidth-aware scheduling and binding in high-level synthesis. - Jason Cong; Yiping Fan; Guoling Han; Yizhou Lin; Junjuan Xu; Zhiru Zhang; Xu Cheng 001 (ASP-DAC, 2005)

BluePower - A New Distributed Multihop Scatternet Formation Protocol for Bluetooth Networks. - Yuanrui Zhang; Shu Liu; Weijia Jia 001; Xu Cheng 001 (ICPP, 2005)

Non-interleaving architecture for hardware implementation of modular multiplication. - Qiang Liu; Dong Tong 001; Xu Cheng 001 (ISCAS (1), 2005)

Lower-bound estimation for multi-bitwidth scheduling. - Junjuan Xu; Jason Cong; Xu Cheng 001 (ISCAS (1), 2005)

A Low Complexity MPEG Video Decoder with Arbitrary Downscaling Capability. - Shu Shi; Feng Liu; Xu Cheng 001 (ESTIMedia, 2006)

An Efficient SSA-Based Algorithm for Complete Global Value Numbering. - Jiu-Tao Nie; Xu Cheng 001 (APLAS, 2007)

GISP: A Transparent Superpage Support Framework for Linux. - Ning Qu; Yansong Zheng; Wei Cao; Xu Cheng 001 (ASAP, 2007)

A Retargetable Software Timing Analyzer Using Architecture Description Language. - Xianfeng Li; Abhik Roychoudhury; Tulika Mitra; Prabhat Mishra 001; Xu Cheng 001 (ASP-DAC, 2007)

Clock domain crossing fault model and coverage metric for validation of SoC design. - Yi Feng 003; Zheng Zhou; Dong Tong 001; Xu Cheng 001 (DATE, 2007)

A Fast Lossless Codec of Continuous-Tone Images for Thin Client Computing. - Chun Yang; Yan Niu; Yubin Xia; Xu Cheng 001 (DCC, 2007)

Reuse Distance Based Cache Leakage Control. - Yulai Zhao 003; Xianfeng Li; Dong Tong 001; Xu Cheng 001 (HiPC, 2007)

NISD: A Framework for Automatic Narrow Instruction Set Design. - Xianhua Liu 001; Jiyu Zhang; Xu Cheng 001 (ICESS, 2007)

Unichos: a full system simulator for thin client platform. - Ning Qu; Yulai Zhao 003; Xuetao Guan; Xu Cheng 001 (SAC, 2007)

Efficient code size reduction without performance loss. - Xianhua Liu 001; Jiyu Zhang; Xu Cheng 001 (SAC, 2007)

A Fast and Efficient Codec for Multimedia Applications in Wireless Thin-Client Computing. - Chun Yang; Yan Niu; Yubin Xia; Xu Cheng 001 (WOWMOM, 2007)

An Energy-Efficient Instruction Scheduler Design with Two-Level Shelving and Adaptive Banking. - Yulai Zhao 003; Xianfeng Li; Dong Tong 001; Xu Cheng 001 (J. Comput. Sci. Technol., 2007)

Super-K: A SoC for single-chip ultra mobile computer. - Xu Cheng 001 (ASP-DAC, 2008)

Analysis and Enhancement for Interactive-Oriented Virtual Machine Scheduling. - Yubin Xia; Yan Niu; Yansong Zheng; Ning Jia; Chun Yang; Xu Cheng 001 (EUC (2), 2008)

CASA: A New IFU Architecture for Power-Efficient Instruction Cache and TLB Designs. - Han-Xin Sun; Kun-Peng Yang; Yulai Zhao 003; Dong Tong 001; Xu Cheng 001 (J. Comput. Sci. Technol., 2008)

Track Down HW Function Faults Using Real SW Invariants. - Yansong Zheng; Dong Tong 001; Hao Li; Keyi Wang; Xu Cheng 001 (CSIE (3), 2009)

WHOLE: A low energy I-Cache with separate way history. - Zichao Xie; Dong Tong 001; Xu Cheng 001 (ICCD, 2009)

A Heterogeneous Auto-offloading Framework Based on Web Browser for Resource-Constrained Devices. - Yang Zhang; Xuetao Guan; Tao Huang; Xu Cheng 001 (ICIW, 2009)

PaS: A Preemption-aware Scheduling Interface for Improving Interactive Performance in Consolidated Virtual Machine Environment. - Yubin Xia; Chun Yang; Xu Cheng 001 (ICPADS, 2009)

A 3D SoC design for H.264 application with on-chip DRAM stacking. - Tao Zhang 032; Kui Wang; Yi Feng 003; Yan Chen; Qun Li; Bing Shao; Jing Xie 006; Xiaodi Song; Lian Duan; Yuan Xie 001; Xu Cheng 001; Youn-Long Lin (3DIC, 2010)

A customized design of DRAM controller for on-chip 3D DRAM stacking. - Tao Zhang 032; Kui Wang; Yi Feng 003; Xiaodi Song; Lian Duan; Yuan Xie 001; Xu Cheng 001; Youn-Long Lin (CICC, 2010)

FEMU: a firmware-based emulation framework for SoC verification. - Hao Li; Dong Tong 001; Kan Huang; Xu Cheng 001 (CODES+ISSS, 2010)

FPGA prototyping of an amba-based windows-compatible SoC. - Kan Huang; Junlin Lu; Jiufeng Pang; Yansong Zheng; Hao Li; Dong Tong 001; Xu Cheng 001 (FPGA, 2010)

Bit-level optimization for high-level synthesis and FPGA-based acceleration. - Jiyu Zhang; Zhiru Zhang; Sheng Zhou; Mingxing Tan; Xianhua Liu 001; Xu Cheng 001; Jason Cong (FPGA, 2010)

Energy efficient management scheme for heterogeneous secondary storage system in mobile computers. - Shu Liu; Xu Cheng 001; Xuetao Guan; Dong Tong 001 (SAC, 2010)

TERA: A FPGA-based trace-driven emulation framework for designing on-chip communication architectures. - Dan Liu; Yi Feng 003; Jingjin Zhou; Dong Tong 001; Xu Cheng 001; Keyi Wang (SoCC, 2010)

Research Progress of UniCore CPUs and PKUnity SoCs. - Xu Cheng 001; Xiaoyin Wang; Junlin Lu; Jiangfang Yi; Dong Tong 001; Xuetao Guan; Feng Liu; Xianhua Liu 001; Chun Yang; Yi Feng 003 (J. Comput. Sci. Technol., 2010)

TAP prediction: Reusing conditional branch predictor for indirect branches with Target Address Pointers. - Zichao Xie; Dong Tong 001; Mingkai Huang; Xiaoyin Wang; Qinqing Shi; Xu Cheng 001 (ICCD, 2011)

Dynamic Memory Demand Estimating Based on the Guest Operating System Behaviors for Virtual Machines. - Yan Niu; Chun Yang; Xu Cheng 001 (ISPA, 2011)

Optimal bypass monitor for high performance last-level caches. - Lingda Li; Dong Tong 001; Zichao Xie; Junlin Lu; Xu Cheng 001 (PACT, 2012)

An integrated and automated memory optimization flow for FPGA behavioral synthesis. - Yuxin Wang; Peng Zhang 007; Xu Cheng 001; Jason Cong (ASP-DAC, 2012)

Energy-efficient branch prediction with Compiler-guided History Stack. - Mingxing Tan; Xianhua Liu 001; Zichao Xie; Dong Tong 001; Xu Cheng 001 (DATE, 2012)

Improving inclusive cache performance with two-level eviction priority. - Lingda Li; Dong Tong 001; Zichao Xie; Junlin Lu; Xu Cheng 001 (ICCD, 2012)

CVP: an energy-efficient indirect branch prediction with compiler-guided value pattern. - Mingxing Tan; Xianhua Liu 001; Tong Tong; Xu Cheng 001 (ICS, 2012)

Reducing last level cache pollution through OS-level software-controlled region-based partitioning. - Tao Huang; Qi Zhong; Xuetao Guan; Xiaoyin Wang; Xu Cheng 001; Keyi Wang (SAC, 2012)

Affinity-aware DMA buffer management for reducing off-chip memory access. - Qi Zhong; Xuetao Guan; Tao Huang; Xu Cheng 001; Keyi Wang (SAC, 2012)

SWIP Prediction: Complexity-Effective Indirect-Branch Prediction Using Pointers. - Zichao Xie; Dong Tong 001; Mingkai Huang; Qinqing Shi; Xu Cheng 001 (J. Comput. Sci. Technol., 2012)

An energy-efficient branch prediction technique via global-history noise reduction. - Zichao Xie; Dong Tong 001; Xu Cheng 001 (ISLPED, 2013)

Page policy control with memory partitioning for DRAM performance and power efficiency. - Mingli Xie; Dong Tong 001; Yi Feng 003; Kan Huang; Xu Cheng 001 (ISLPED, 2013)

DTT: program structure-aware indirect branch optimization via direct-TPC-table in DBT system. - Ning Jia; Chun Yang; Yu He; Xu Cheng 001 (Conf. Computing Frontiers, 2014)

Improving system throughput and fairness simultaneously in shared memory CMP systems via Dynamic Bank Partitioning. - Mingli Xie; Dong Tong 001; Kan Huang; Xu Cheng 001 (HPCA, 2014)

Block value based insertion policy for high performance last-level caches. - Lingda Li; Junlin Lu; Xu Cheng 001 (ICS, 2014)

SPTU: Improving Dynamic Binary Translation through Software Prediction with Target Updating. - Ning Jia; Chun Yang; Yu He; Xu Cheng 001 (SYSTOR, 2014)

Retention Benefit Based Intelligent Cache Replacement. - Lingda Li; Junlin Lu; Xu Cheng 001 (J. Comput. Sci. Technol., 2014)

Exploration of the Relationship Between Just-in-Time Compilation Policy and Number of Cores. - Mingkai Huang; Xianhua Liu 001; Tingyu Zhang; Xu Cheng 001 (ICA3PP (4), 2015)

An Energy-Efficient Branch Prediction with Grouped Global History. - Mingkai Huang; Dan He; Xianhua Liu 001; Mingxing Tan; Xu Cheng 001 (ICPP, 2015)

vSIP: virtual scheduler for interactive performance. - Yan Sui; Chun Yang; Ning Jia; Xu Cheng 001 (Conf. Computing Frontiers, 2016)

MFAP: Fair Allocation between fully backlogged and non-fully backlogged applications. - Yan Sui; Chun Yang; Dong Tong 001; Xianhua Liu 001; Xu Cheng 001 (ICCD, 2016)

A Staged Memory Resource Management Method for CMP systems. - Yangguo Liu; Junlin Lu; Dong Tong 001; Xu Cheng 001 (ASAP, 2017)

Locality-aware bank partitioning for shared DRAM MPSoCs. - Yangguo Liu; Junlin Lu; Dong Tong 001; Xu Cheng 001 (ASP-DAC, 2017)

Understanding the I/O Behavior of Desktop Applications in Virtualization. - Yan Sui; Chun Yang; Xu Cheng 001 (Conf. Computing Frontiers, 2017)

Prediction of distribution network malfunction based on meteorological factors. - Mingzhu Zhang; Yan Chen; Ruoxi Liu; Xu Cheng 001; Yi Jiao; Jiakui Zhao; Ouyang Hong (ICNC-FSKD, 2017)

Content Look-Aside Buffer for Redundancy-Free Virtual Disk I/O and Caching. - Chun Yang; Xianhua Liu 001; Xu Cheng 001 (VEE, 2017)

Coalesced TLB to Exploit Diverse Contiguity of Memory Mapping. - Yikun Ban; Yuchen Zhou; Jingrui He; Xu Cheng 001; Jiangfang Yi (CoRR, 2019)

An Efficient Register Renaming Technique with Delayed Allocation and Register Packing. - Xianhua Liu 001; Qinghong Yang; Miao Tao; Qinshu Chen; Xu Cheng 001 (ICECS, 2020)

SMA: Eliminate Memory Spatial Errors via Saturation Memory Access. - Dongwei Chen; Daliang Xu; Dong Tong 001; Kang Sun; Xuetao Guan; Chun Yang; Xu Cheng 001 (CoRR, 2020)

DangKiller: Eliminating Dangling Pointers Efficiently via Implicit Identifier. - Daliang Xu; Dongwei Chen; Chun Yang; Kang Sun; Xu Cheng 001; Dong Tong 001 (CoRR, 2020)

S3Library: Automatically Eliminating C/C++ Buffer Overflow using Compatible Safer Libraries. - Kang Sun; Daliang Xu; Dongwei Chen; Xu Cheng 001; Dong Tong 001 (CoRR, 2020)

MetaTableLite: An Efficient Metadata Management Scheme for Tagged-Pointer-Based Spatial Safety. - Dongwei Chen; Dong Tong 001; Chun Yang; Xu Cheng 001 (ICCD, 2021)

Differential Testing of x86 Instruction Decoders with Instruction Operand Inferring Algorithm. - Guang Wang 005; Ziyuan Zhu; Shuan Li; Xu Cheng 001; Dan Meng 002 (ICCD, 2021)

Abusing Cache Line Dirty States to Leak Information in Commercial Processors. - Yujie Cui; Xu Cheng 001 (CoRR, 2021)

Abusing Cache Line Dirty States to Leak Information in Commercial Processors. - Yujie Cui; Chun Yang; Xu Cheng 001 (HPCA, 2022)

In-depth Testing of x86 Instruction Disassemblers with Feedback Controlled DFS Algorithm. - Guang Wang 005; Ziyuan Zhu; Xu Cheng 001; Dan Meng 002 (ICCD, 2022)

MBAPIS: Multi-Level Behavior Analysis Guided Program Interval Selection for Microarchitecture Studies. - Hongwei Cui; Yujie Cui; Honglan Zhan; Shuhao Liang; Xianhua Liu 001; Chun Yang; Xu Cheng 001 (PACT, 2023)

Detecting and Mitigating Cache Side Channel Threats on Intel SGX. - Wenjing Cai; Ziyuan Zhu; Yuxin Liu; Yusha Zhang; Xu Cheng 001 (CSCWD, 2023)

A Hardware-Software Cooperative Interval-Replaying for FPGA-based Architecture Evaluation. - Hongwei Cui; Shuhao Liang; Yujie Cui; Weiqi Zhang; Honglan Zhan; Chun Yang; Xianhua Liu 001; Xu Cheng 001 (DATE, 2023)

High-Speed and Energy-Efficient Single-Port Content Addressable Memory to Achieve Dual-Port Operation. - Honglan Zhan; Chenxi Wang; Hongwei Cui; Xianhua Liu 001; Feng Liu; Xu Cheng 001 (DATE, 2023)

Secure Speculation via Speculative Secret Flow Tracking. - Hongwei Cui; Chun Yang; Xu Cheng 001 (J. Comput. Sci. Technol., 2023)

FlexPointer: Fast Address Translation Based on Range TLB and Tagged Pointers. - Dongwei Chen; Dong Tong 001; Chun Yang; Jiangfang Yi; Xu Cheng 001 (ACM Trans. Archit. Code Optim., 2023)

Information Leakage Attacks Exploiting Cache Replacement in Commercial Processors. - Yujie Cui; Hongwei Cui; Xu Cheng 001 (IEEE Trans. Computers, 2023)

A High-Coverage and Efficient Instruction-Level Testing Approach for x86 Processors. - Guang Wang 005; Ziyuan Zhu; Xu Cheng 001; Dan Meng 002 (IEEE Trans. Computers, 2023)

Oblivious Demand Paging with Ring ORAM in RISC-V Trusted Execution Environments. - Wenjing Cai; Ziyuan Zhu; Yuxin Liu; Yusha Zhang; Xu Cheng 001 (CSCWD, 2024)

Multi: Reduce Energy Overhead of Criticality-Aware Dynamic Instruction Scheduling for Energy Efficiency. - Honglan Zhan; Chenxi Wang; Xin Wang; Chun Yang; Xianhua Liu 001; Xu Cheng 001 (ICCD, 2024)

Hyperion: A Highly Effective Page and PC Based Delta Prefetcher. - Yujie Cui; Wei Chen; Xu Cheng 001; Jiangfang Yi (ACM Trans. Archit. Code Optim., 2024)