Evaluation of Placement Techniques for DNA Probe Array Layout. - Andrew B. Kahng; Ion I. Mandoiu; Sherief Reda; Xu Xu 001; Alexander Zelikovsky (ICCAD, 2003)

Design Flow Enhancements for DNA Arrays. - Andrew B. Kahng; Ion I. Mandoiu; Sherief Reda; Xu Xu 001; Alexander Zelikovsky (ICCD, 2003)

Local unidirectional bias for smooth cutsize-delay tradeoff in performance-driven bipartitioning. - Andrew B. Kahng; Xu Xu 001 (ISPD, 2003)

Accurate pseudo-constructive wirelength and congestion estimation. - Andrew B. Kahng; Xu Xu 001 (SLIP, 2003)

Multi-project reticle floorplanning and wafer dicing. - Andrew B. Kahng; Ion I. Mandoiu; Qinke Wang; Xu Xu 001; Alexander Zelikovsky (ISPD, 2004)

Local unidirectional bias for cutsize-delay tradeoff in performance-driven bipartitioning. - Andrew B. Kahng; Xu Xu 001 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2004)

Bright-Field AAPSM Conflict Detection and Correction. - Charles C. Chiang; Andrew B. Kahng; Subarna Sinha; Xu Xu 001; Alexander Zelikovsky (DATE, 2005)

Fast and efficient phase conflict detection and correction in standard-cell layouts. - Charles C. Chiang; Andrew B. Kahng; Subarna Sinha; Xu Xu 001 (ICCAD, 2005)

Statistical gate delay calculation with crosstalk alignment consideration. - Andrew B. Kahng; Bao Liu 001; Xu Xu 001 (ACM Great Lakes Symposium on VLSI, 2006)

Constructing Current-Based Gate Models Based on Existing Timing Library. - Andrew B. Kahng; Bao Liu 001; Xu Xu 001 (ISQED, 2006)

Statistical crosstalk aggressor alignment aware interconnect delay calculation. - Andrew B. Kahng; Bao Liu 001; Xu Xu 001 (SLIP, 2006)

Wafer Topography-Aware Optical Proximity Correction. - Puneet Gupta 001; Andrew B. Kahng; Chul-Hong Park; Kambiz Samadi; Xu Xu 001 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2006)

Computer-Aided Optimization of DNA Array Design and Manufacturing. - Andrew B. Kahng; Ion I. Mandoiu; Sherief Reda; Xu Xu 001; Alexander Zelikovsky (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2006)

A Global Minimum Clock Distribution Network Augmentation Algorithm for Guaranteed Clock Skew Yield. - Bao Liu 001; Andrew B. Kahng; Xu Xu 001; Jiang Hu; Ganesh Venkataraman (ASP-DAC, 2007)

Fast and Efficient Bright-Field AAPSM Conflict Detection and Correction. - Charles C. Chiang; Andrew B. Kahng; Subarna Sinha; Xu Xu 001; Alexander Zelikovsky (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2007)

Statistical Timing Analysis in the Presence of Signal-Integrity Effects. - Andrew B. Kahng; Bao Liu 001; Xu Xu 001 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2007)

Enhanced Design Flow and Optimizations for Multiproject Wafers. - Andrew B. Kahng; Ion I. Mandoiu; Xu Xu 001; Alexander Zelikovsky (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2007)

Layout decomposition for double patterning lithography. - Andrew B. Kahng; Chul-Hong Park; Xu Xu 001; Hailong Yao (ICCAD, 2008)

Fast Dual-Graph-Based Hotspot Filtering. - Andrew B. Kahng; Chul-Hong Park; Xu Xu 001 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2008)

Layout Decomposition Approaches for Double Patterning Lithography. - Andrew B. Kahng; Chul-Hong Park; Xu Xu 001; Hailong Yao (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2010)