Asynchronous Memory Access Unit for General Purpose Processors. - Luming Wang; Xu Zhang 033; Tianyue Lu; Mingyu Chen 001 (CoRR, 2021)

GraFF: A Multi-FPGA System with Memory Semantic Fabric for Scalable Graph Processing. - Xu Zhang 033; Yisong Chang; Tianyue Lu; Ke Liu 004; Ke Zhang 017; Mingyu Chen 001 (FPT, 2022)

Rethinking Design Paradigm of Graph Processing System with a CXL-like Memory Semantic Fabric. - Xu Zhang 033; Yisong Chang; Tianyue Lu; Ke Zhang 017; Mingyu Chen 001 (CCGrid, 2023)

Morpheus: An Adaptive DRAM Cache with Online Granularity Adjustment for Disaggregated Memory. - Xu Zhang 033; Tianyue Lu; Yisong Chang; Ke Zhang 017; Mingyu Chen 001 (ICCD, 2023)

DFabric: Scaling Out Data Parallel Applications with CXL-Ethernet Hybrid Interconnects. - Xu Zhang 033; Ke Liu 004; Yisong Chang; Hui Yuan; Xiaolong Zheng; Ke Zhang 017; Mingyu Chen 001 (CoRR, 2024)

Asynchronous Memory Access Unit: Exploiting Massive Parallelism for Far Memory Access. - Luming Wang; Xu Zhang 033; Songyue Wang; Zhuolun Jiang; Tianyue Lu; Mingyu Chen 001; Siwei Luo; Keji Huang (ACM Trans. Archit. Code Optim., 2024)

DRack: A CXL-Disaggregated Rack Architecture to Boost Inter-Rack Communication. - Xu Zhang 033; Ke Liu 004; Yuan Hui; Xiaolong Zheng; Yisong Chang; Yizhou Shan; Guanghui Zhang; Ke Zhang 017; Yungang Bao; Mingyu Chen 001; Chenxi Wang (USENIX ATC, 2025)