Detection of illegitimate access to JTAG via statistical learning in chip. - Xuanle Ren; Vítor Grade Tavares; R. D. (Shawn) Blanton (DATE, 2015)

Improving accuracy of on-chip diagnosis via incremental learning. - Xuanle Ren; Mitchell Martin; Ronald D. Blanton (VTS, 2015)

A Learning-Based Approach to Secure JTAG Against Unseen Scan-Based Attacks. - Xuanle Ren; Ronald D. Blanton; Vítor Grade Tavares (ISVLSI, 2016)

Detection of IJTAG attacks using LDPC-based feature reduction and machine learning. - Xuanle Ren; R. D. (Shawn) Blanton; Vítor Grade Tavares (ETS, 2018)

IC protection against JTAG/IJTAG-based attacks - Xuanle Ren (2018)

IC Protection Against JTAG-Based Attacks. - Xuanle Ren; Francisco Pimentel Torres; Ronald D. Blanton; Vítor Grade Tavares (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2019)

Customizing Trusted AI Accelerators for Efficient Privacy-Preserving Machine Learning. - Peichen Xie; Xuanle Ren; Guangyu Sun 003 (CoRR, 2020)

Design and Evaluation of Fluctuating Power Logic to Mitigate Power Analysis at the Cell Level. - Fan Zhang 010; Bolin Yang; Bojie Yang; Yiran Zhang; Xuanle Ren; Shivam Bhasin; Kui Ren 001 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021)

An Enclave-based TEE for SE-in-SoC in RISC-V Industry. - Xuanle Ren; Xiaoxia Cui (CoRR, 2022)

HEDA: Multi-Attribute Unbounded Aggregation over Homomorphically Encrypted Database. - Xuanle Ren; Le Su; Zhen Gu; Sheng Wang 011; Feifei Li 001; Yuan Xie 001; Song Bian 001; Chao Li; Fan Zhang (Proc. VLDB Endow., 2022)

CHAM: A Customized Homomorphic Encryption Accelerator for Fast Matrix-Vector Product. - Xuanle Ren; Zhaohui Chen; Zhen Gu; Yanheng Lu; Ruiguang Zhong; Wen-Jie Lu; Jiansong Zhang 001; Yichi Zhang; Hanghang Wu; Xiaofu Zheng; Heng Liu; Tingqiang Chu; et al. (DAC, 2023)

SAFE: A Scalable Homomorphic Encryption Accelerator for Vertical Federated Learning. - Zhaohui Chen; Zhen Gu; Yanheng Lu; Xuanle Ren; Ruiguang Zhong; Wen-Jie Lu; Jiansong Zhang 001; Yichi Zhang; Hanghang Wu; Xiaofu Zheng; Heng Liu; Tingqiang Chu; et al. (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2025)