Analysis of super cut-off transistors for ultralow power digital logic circuits. - Arijit Raychowdhury; Xuanyao Fong; Qikai Chen; Kaushik Roy 001 (ISLPED, 2006)

A design methodology and device/circuit/architecture compatible simulation framework for low-power magnetic quantum cellular automata systems. - Charles Augustine; Behtash Behin-Aein; Xuanyao Fong; Kaushik Roy 001 (ASP-DAC, 2009)

Reading spin-torque memory with spin-torque sensors. - Mrigank Sharad; Rangharajan Venkatesan; Xuanyao Fong; Anand Raghunathan; Kaushik Roy 001 (NANOARCH, 2013)

Dual pillar spin-transfer torque MRAMs for low power applications. - Niladri Narayan Mojumder; Xuanyao Fong; Charles Augustine; Sumeet Kumar Gupta; Sri Harsha Choday; Kaushik Roy 001 (ACM J. Emerg. Technol. Comput. Syst., 2013)

Highly reliable memory-based Physical Unclonable Function using Spin-Transfer Torque MRAM. - Le Zhang 001; Xuanyao Fong; Chip-Hong Chang; Zhi-Hui Kong; Kaushik Roy 001 (ISCAS, 2014)

Laser Induced Magnetization Reversal for Detection in Optical Interconnects. - Zubair Al Azim; Xuanyao Fong; Thomas Ostler; Roy W. Chantrell; Kaushik Roy 001 (CoRR, 2014)

Spin-Orbit Torque Induced Spike-Timing Dependent Plasticity. - Abhronil Sengupta; Zubair Al Azim; Xuanyao Fong; Kaushik Roy 001 (CoRR, 2014)

Failure Mitigation Techniques for 1T-1MTJ Spin-Transfer Torque MRAM Bit-cells. - Xuanyao Fong; Yusung Kim 002; Sri Harsha Choday; Kaushik Roy 001 (IEEE Trans. Very Large Scale Integr. Syst., 2014)

Design of robust spin-transfer torque magnetic random access memories for ultralow power high performance on-chip cache applications - Xuanyao Fong (2014)

Approximate storage for energy efficient spintronic memories. - Ashish Ranjan 001; Swagath Venkataramani; Xuanyao Fong; Kaushik Roy 001; Anand Raghunathan (DAC, 2015)

Device/circuit/architecture co-design of reliable STT-MRAM. - Zoha Pajouhi; Xuanyao Fong; Kaushik Roy 001 (DATE, 2015)

Spintastic: spin-based stochastic logic for energy-efficient computing. - Rangharajan Venkatesan; Swagath Venkataramani; Xuanyao Fong; Kaushik Roy 001; Anand Raghunathan (DATE, 2015)

Domain wall motion-based low power hybrid spin-CMOS 5-bit Flash Analog Data Converter. - Karthik Yogendra; Mei-Chin Chen; Xuanyao Fong; Kaushik Roy 001 (ISQED, 2015)

Exploring Spin Transfer Torque Devices for Unconventional Computing. - Kaushik Roy 001; Deliang Fan; Xuanyao Fong; Yusung Kim 002; Mrigank Sharad; Somnath Paul; Subho Chatterjee; Swarup Bhunia; Saibal Mukhopadhyay (IEEE J. Emerg. Sel. Topics Circuits Syst., 2015)

Optimizating Emerging Nonvolatile Memories for Dual-Mode Applications: Data Storage and Key Generator. - Le Zhang 001; Xuanyao Fong; Chip-Hong Chang; Zhi-Hui Kong; Kaushik Roy 001 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2015)

Highly Reliable Spin-Transfer Torque Magnetic RAM-Based Physical Unclonable Function With Multi-Response-Bits Per Cell. - Le Zhang 001; Xuanyao Fong; Chip-Hong Chang; Zhi-Hui Kong; Kaushik Roy 001 (IEEE Trans. Inf. Forensics Secur., 2015)

A low-voltage, low power STDP synapse implementation using domain-wall magnets for spiking neural networks. - Govind Narasimman; Subhrajit Roy; Xuanyao Fong; Kaushik Roy 001; Chip-Hong Chang; Arindam Basu (ISCAS, 2016)

Comprehensive Scaling Analysis of Current Induced Switching in Magnetic Memories Based on In-Plane and Perpendicular Anisotropies. - Akhilesh Jaiswal 001; Xuanyao Fong; Kaushik Roy 001 (IEEE J. Emerg. Sel. Topics Circuits Syst., 2016)

High Performance and Energy-Efficient On-Chip Cache Using Dual Port (1R/1W) Spin-Orbit Torque MRAM. - Yeongkyo Seo; Kon-Woo Kwon; Xuanyao Fong; Kaushik Roy 001 (IEEE J. Emerg. Sel. Topics Circuits Syst., 2016)

Yield, Area, and Energy Optimization in STT-MRAMs Using Failure-Aware ECC. - Zoha Pajouhi; Xuanyao Fong; Anand Raghunathan; Kaushik Roy 001 (ACM J. Emerg. Technol. Comput. Syst., 2016)

Spin-Transfer Torque Memories: Devices, Circuits, and Systems. - Xuanyao Fong; Yusung Kim 002; Rangharajan Venkatesan; Sri Harsha Choday; Anand Raghunathan; Kaushik Roy 001 (Proc. IEEE, 2016)

Spin-Transfer Torque Devices for Logic and Memory: Prospects and Perspectives. - Xuanyao Fong; Yusung Kim 002; Karthik Yogendra; Deliang Fan; Abhronil Sengupta; Anand Raghunathan; Kaushik Roy 001 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2016)

Embedding Read-Only Memory in Spin-Transfer Torque MRAM-Based On-Chip Caches. - Xuanyao Fong; Rangharajan Venkatesan; Dongsoo Lee; Anand Raghunathan; Kaushik Roy 001 (IEEE Trans. Very Large Scale Integr. Syst., 2016)

Fast and Disturb-Free Nonvolatile Flip-Flop Using Complementary Polarizer MTJ. - Yeongkyo Seo; Xuanyao Fong; Kaushik Roy 001 (IEEE Trans. Very Large Scale Integr. Syst., 2017)

Domain Wall Motion-based XOR-like Activation Unit With A Programmable Threshold. - Suman Deb; Tarun Vatwani; Anupam Chattopadhyay; Arindam Basu; Xuanyao Fong (IJCNN, 2018)

Domain Wall Motion-Based Dual-Threshold Activation Unit for Low-Power Classification of Non-Linearly Separable Functions. - Suman Deb; Tarun Vatwani; Anupam Chattopadhyay; Arindam Basu; Xuanyao Fong (IEEE Trans. Biomed. Circuits Syst., 2018)

Aggressive Leakage Current Reduction for Embedded MRAM Using Block-Level Power Gating. - Anh Tuan Do; Xuanyao Fong; Fei Li 015 (IECON, 2020)

SIMBA: A Skyrmionic In-Memory Binary Neural Network Accelerator. - Venkata Pavan Kumar Miriyala; Kale Rahul Vishwanath; Xuanyao Fong (CoRR, 2020)

Exchange-Coupling-Enabled Electrical-Isolation of Compute and Programming Paths in Valley-Spin Hall Effect based Spintronic Device for Neuromorphic Applications. - Karam Cho; Xuanyao Fong; Sumeet Kumar Gupta (DRC, 2021)

Connection Pruning for Deep Spiking Neural Networks with On-Chip Learning. - Thao N. N. Nguyen; Bharadwaj Veeravalli; Xuanyao Fong (ICONS, 2021)

An FPGA-Based Co-Processor for Spiking Neural Networks with On-Chip STDP-Based Learning. - Thao N. N. Nguyen; Bharadwaj Veeravalli; Xuanyao Fong (ISCAS, 2022)

CITS: Coherent Ising Tree Search Algorithm Towards Solving Combinatorial Optimization Problems. - Yunuo Cen; Debasis Das; Xuanyao Fong (CoRR, 2022)

Electrical Tunable Spintronic Neuron with Trainable Activation Function. - Yue Xin; Kang Zhou 001; Xuanyao Fong; Yumeng Yang; Shenghua Gao; Zhifeng Zhu (CoRR, 2022)

Domain-specific computing with non-volatile multi-terminal devices. - Xuanyao Fong (ICICDT, 2023)

A Semi-Supervised Learning Method for Spiking Neural Networks Based on Pseudo-Labeling. - Thao N. N. Nguyen; Bharadwaj Veeravalli; Xuanyao Fong (IJCNN, 2023)

Energy-efficient superparamagnetic Ising machine and its application to traveling salesman problems. - Jia Si; Shuhan Yang; Yunuo Cen; Jiaer Chen; Zhaoyang Yao; Dong-Jun Kim; Kaiming Cai; Jerald Yoo; Xuanyao Fong; Hyunsoo Yang (CoRR, 2023)

Benchmarking DNN Mapping Methods for the in-Memory Computing Accelerators. - Yimin Wang 001; Xuanyao Fong (IEEE J. Emerg. Sel. Topics Circuits Syst., 2023)

Design Framework for Ising Machines with Bistable Latch-Based Spins and All-to-All Resistive Coupling. - Yimin Wang 001; Yunuo Cen; Xuanyao Fong (ISCAS, 2024)

Energy-Efficient Ising Machines Using Capacitance-Coupled Latches for MaxCut Solving. - Yimin Wang 001; Xuanyao Fong (ISCAS, 2024)

Transposable Memory Based on the Ferroelectric Field-Effect Transistor. - Jianze Wang; Wei Zhang; Zhen Wu; Yimin Wang 001; Leming Jiao; Xiaolin Wang 007; Xiao Gong; Xuanyao Fong (ISCAS, 2024)

Analysis of Higher-Order Ising Hamiltonians. - Yunuo Cen; Zhiwei Zhang; Zixuan Wang; Yimin Wang 001; Xuanyao Fong (CoRR, 2024)

Massively Parallel Continuous Local Search for Hybrid SAT Solving on GPUs. - Yunuo Cen; Zhiwei Zhang; Xuanyao Fong (AAAI, 2025)

Comprehensive Modeling and Investigation of Intrinsic Variation Source Fluctuation in 2D-Layered Thin Film Transistors. - Tao Du; Wei Zhang; Xuanyao Fong; Guangxi Hu; Peng Zhou; Ye Lu (IRPS, 2025)

A Pseudo-Boolean Encoding Method for Rectilinear Steiner Arborescence in VLSI Routing. - Zixuan Wang; Yunuo Cen; Xuanyao Fong (ISCAS, 2025)

Hierarchical Recording Architecture for Three-Dimensional Magnetic Recording. - Yugen Jian; Ke Luo; Jincai Chen; Xuanyao Fong (CoRR, 2025)