Xudong Shi

According to our database1, Xudong Shi authored at least 25 papers between 2006 and 2020.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.



In proceedings 
PhD thesis 


On csauthors.net:


Adaptive ensemble learning strategy for semi-supervised soft sensing.
J. Frankl. Inst., 2020

Multivariate Regression with Gross Errors on Manifold-Valued Data.
IEEE Trans. Pattern Anal. Mach. Intell., 2019

Reliability analysis for electric power systems of more-electric aircraft based on the minimal path set.
J. Comput. Methods Sci. Eng., 2019

Soft sensor modeling with a selective updating strategy for Gaussian process regression based on probabilistic principle component analysis.
J. Frankl. Inst., 2018

Modeling and simulation of aircraft main generator stator winding faults.
J. Comput. Methods Sci. Eng., 2017

Research on Fault Diagnosis Method of Civil Aviation Engine Variable Bleed Valve System Based on Artificial Immune Algorithm.
Int. J. Pattern Recognit. Artif. Intell., 2016

Static modeling and power flow of the more electric aircraft power system.
Proceedings of the 3rd International Conference on Systems and Informatics, 2016

Modeling and Simulation of Power Distribution System in More Electric Aircraft.
J. Electr. Comput. Eng., 2015

Research on aircraft engine actuator and sensor faults diagnosis with Takagi-Sugeno fuzzy model and H^∞ observer.
J. Comput. Methods Sci. Eng., 2015

Research on noise reduction of weak signals in grounding reliability testing of aircraft cable shield.
J. Comput. Methods Sci. Eng., 2015

A Fault Diagnosis Scheme for Aircraft Multibranches Wiring Network Based on Matching Algorithm.
Int. J. Distributed Sens. Networks, 2015

Directory Lookaside Table: Enabling scalable, low-conflict, many-core cache coherence directory.
Proceedings of the 20th IEEE International Conference on Parallel and Distributed Systems, 2014

Janus: Optimal Flash Provisioning for Cloud Storage Workloads.
Proceedings of the 2013 USENIX Annual Technical Conference, 2013

A Tri-Modal 20-Gbps/Link Differential/DDR3/GDDR5 Memory Interface.
IEEE J. Solid State Circuits, 2012

Enhancements for Accurate and Timely Streaming Prefetcher.
J. Instr. Level Parallelism, 2011

Lamarckism and mechanism synthesis: approaching constrained optimization with ideas from biology
CoRR, 2011

Semantics-Aware, Timely Prefetching of Linked Data Structure.
Proceedings of the 16th IEEE International Conference on Parallel and Distributed Systems, 2010

Modeling and Stack Simulation of CMP Cache Capacity and Accessibility.
IEEE Trans. Parallel Distributed Syst., 2009

A 16 Gb/s/Link, 64 GB/s Bidirectional Asymmetric Memory Interface.
IEEE J. Solid State Circuits, 2009

Clocking circuits for a 16Gb/s memory interface.
Proceedings of the IEEE 2008 Custom Integrated Circuits Conference, 2008

CMP cache performance projection: accessibility vs. capacity.
SIGARCH Comput. Archit. News, 2007

Modeling and Single-Pass Simulation of CMP Cache Capacity and Accessibility.
Proceedings of the 2007 IEEE International Symposium on Performance Analysis of Systems and Software, 2007

Comparative evaluation of multi-core cache occupancy strategies.
Proceedings of the 13th International Conference on Parallel and Distributed Systems, 2007

Coterminous locality and coterminous group data prefetching on chip-multiprocessors.
Proceedings of the 20th International Parallel and Distributed Processing Symposium (IPDPS 2006), 2006

Overlapping dependent loads with addressless preload.
Proceedings of the 15th International Conference on Parallel Architectures and Compilation Techniques (PACT 2006), 2006