A 3.0 Gb/s clock data recovery circuits based on digital DLL for clock-embedded display interface. - Jae-Wook Kwon; Xuefan Jin; Gyoo-Cheol Hwang; Jung-Hoon Chun; Kee-Won Kwon (ESSCIRC, 2012)

A 12.5-Gb/s near-GND transceiver for wire-line UHD video interfaces. - Seok Kim; Jung-Myung Kang; Xuefan Jin; Se-Ung Park; Ja-Hoon Jin; Kee-Won Kwon; Jung-Hoon Chun; Jung Ho Lee; Jun Young Park; Dae Young Lee (ISCAS, 2014)

A digital DLL with 4-cycle lock time and 1/4 NAND-delay accuracy. - Sung-Yong Kim; Xuefan Jin; Jung-Hoon Chun; Kee-Won Kwon (A-SSCC, 2015)

A 17.5-Gb/s transceiver with a MaxEye-based autonomous adaptation. - Ja-Hoon Jin; Xuefan Jin; Sang-Hoon Kim; Ik-Hwan Kim; Jaehong Jung; Kiwon Kwon; Jung-Hoon Chun (ISCAS, 2017)

A 21-Gb/s Dual-Channel Voltage-Mode Transmitter With Stacked NRZ and PAM4 Drivers. - Sung-Ha Kim; Sang-Hoon Kim; Xuefan Jin; Yoonmyung Lee; Jung-Hoon Chun (IEEE Access, 2018)

A 0.75-3.0-Gb/s Dual-Mode Temperature-Tolerant Referenceless CDR With a Deadzone-Compensated Frequency Detector. - Ja-Hoon Jin; Xuefan Jin; Jaehong Jung; Kiwon Kwon; Jintae Kim; Jung-Hoon Chun (IEEE J. Solid State Circuits, 2018)

A 12.5-Gb/s Near-Ground Transceiver Employing a MaxEye Algorithm-Based Adaptation Technique. - Ja-Hoon Jin; Seok Kim; Xuefan Jin; Sang-Hoon Kim; Jung-Hoon Chun (IEEE Trans. Very Large Scale Integr. Syst., 2018)

A 4-GHz Sub-harmonically Injection-Locked Phase-Locked Loop with Self-Calibrated Injection Timing and Pulsewidth. - Xuefan Jin; Dong-Seok Kang; Youngjun Ko; Kee-Won Kwon; Jung-Hoon Chun (A-SSCC, 2019)

A 4-GHz Sub-Harmonically Injection-Locked Phase-Locked Loop With Self-Calibrated Injection Timing and Pulsewidth. - Xuefan Jin; Woosung Park; Dong-Seok Kang; Youngjun Ko; Kee-Won Kwon; Jung-Hoon Chun (IEEE J. Solid State Circuits, 2020)

A 21Gb/s Duobinary Transceiver for GDDR interfaces with an Adaptive Equalizer. - Jae-Woo Park; Dongsuk Kang; Injae Park; Minsu Park; Xuefan Jin; Kyu-Dong Hwang; Dae-Han Kwon; Jung-Hoon Chun (A-SSCC, 2021)

A 21-Gb/s Duobinary Transceiver for GDDR Interfaces With an Adaptive Equalizer. - Dongsuk Kang; Jae-Woo Park; Injae Park; Minsu Park; Xuefan Jin; Kyu-Dong Hwang; Dae-Han Kwon; Jung-Hoon Chun (IEEE J. Solid State Circuits, 2022)