An Automatic Coverage Analysis for SystemC Using UML and Aspect-Oriented Technology. - Yan Chen; Xuan Du; Xuegong Zhou; Chenglian Peng (CSCWD (Selected papers), 2004)

ESIDE - embedded system integrated design environment based on Eclipse platform. - Xuegong Zhou; Yan Chen; Liang Liang; Chenglian Peng; Hao Shen; Jingyao Zhang (CSCWD (1), 2005)

A MDA based SoC Modeling Approach using UML and SystemC. - Ying Wang 032; Xuegong Zhou; Bo Zhou; Liang Liang; Chenglian Peng (CIT, 2006)

On-line scheduling of real-time tasks for reconfigurable computing system. - Xuegong Zhou; Ying Wang 032; XunZhang Huang; Chenglian Peng (FPT, 2006)

System Prototyping Based on SystemC Transaction-Level Modeling. - Liang Liang; Bo Zhou; Xuegong Zhou; Chenglian Peng (IMSCCS (2), 2006)

Online Hybrid Task Scheduling in Reconfigurable Systems. - Liang Liang; Xuegong Zhou; Ying Wang 032; Chenglian Peng (CSCWD, 2007)

Online Task Scheduling for Heterogeneous Reconfigurable Systems. - Xuegong Zhou; Liang Liang; Ying Wang 032; Chenglian Peng (CSCWD (Selected Papers), 2007)

Fast On-line Task Placement and Scheduling on Reconfigurable Devices. - Xuegong Zhou; Ying Wang 032; XunZhang Huang; Chenglian Peng (FPL, 2007)

General switch box modeling and optimization for FPGA routing architectures. - Kejie Ma; Lingli Wang; Xuegong Zhou; Sheldon X.-D. Tan; Jiarong Tong (FPT, 2010)

Automatic layout generator for embedded FPGA cores. - Chaofan Yu; Lingli Wang; Xuegong Zhou (ASICON, 2011)

A partially reconfigurable architecture supporting hardware threads. - Ying Wang 032; Jian Yan 002; Xuegong Zhou; Lingli Wang; Wayne Luk; Chenglian Peng; Jiarong Tong (FPT, 2012)

A reconfigurable floating-point FFT architecture. - Chenlu Wu; Wei Cao 002; Xuegong Zhou; Lingli Wang; Fang Wang; Baodi Yuan (ASICON, 2013)

Implementation of high performance hardware architecture of OpenSURF algorithm on FPGA. - Xitian Fan; Chenlu Wu; Wei Cao 002; Xuegong Zhou; Shengye Wang; Lingli Wang (FPT, 2013)

An FPGA-cluster-accelerated match engine for content-based image retrieval. - Chen Liang; Chenlu Wu; Xuegong Zhou; Wei Cao 002; Shengye Wang; Lingli Wang (FPT, 2013)

A hardware implementation of Bag of Words and Simhash for image recognition. - Shengye Wang; Chen Liang; Xuegong Zhou; Wei Cao 002; Chenlu Wu; Xitian Fan; Lingli Wang (FPT, 2013)

SPREAD: A Streaming-Based Partially Reconfigurable Architecture and Programming Model. - Ying Wang 032; Xuegong Zhou; Lingli Wang; Jian Yan 002; Wayne Luk; Chenglian Peng; Jiarong Tong (IEEE Trans. Very Large Scale Integr. Syst., 2013)

An automated test framework for SRAM-based FPGA. - Xuemin Lv; Moucheng Yang; Xuegong Zhou; Lingli Wang (ASICON, 2015)

UniStream: A unified stream architecture combining configuration and data processing. - Jian Yan 002; Jifang Jin; Ying Wang 032; Xuegong Zhou; Philip H. W. Leong; Lingli Wang (FPL, 2015)

An adaptive cross-layer fault recovery solution for reconfigurable SoCs. - Jifang Jin; Jian Yan 002; Xuegong Zhou; Lingli Wang (FPT, 2015)

A high performance FPGA-based accelerator for large-scale convolutional neural networks. - Huimin Li 005; Xitian Fan; Li Jiao; Wei Cao 002; Xuegong Zhou; Lingli Wang (FPL, 2016)

High performance Deformable Part Model accelerator based on FPGA. - Qi Zhan; Min Gao; Li Jiao; Wei Cao 002; Xuegong Zhou; Lingli Wang (FPT, 2016)

An on-line debug method for FPGAs. - Yipeng Yuan; Zhihua Feng; Xuegong Zhou (ASICON, 2017)

Accelerating low bit-width convolutional neural networks with embedded FPGA. - Li Jiao; Cheng Luo; Wei Cao 002; Xuegong Zhou; Lingli Wang (FPL, 2017)

A scalable hybrid architecture for high performance data-parallel applications. - Moucheng Yang; Jifang Jin; Zhehao Li; Xuegong Zhou; Shaojun Wang; Lingli Wang (FPT, 2017)

RBSA: Range-based simulated annealing for FPGA placement. - Junqi Yuan; Lingli Wang; Xuegong Zhou; Yinshui Xia; Jianping Hu (FPT, 2017)

Fast Adjustable NPN Classification using Generalized Symmetries. - Xuegong Zhou; Lingli Wang; Peiyi Zhao; Alan Mishchenko (FPL, 2018)

A Complete CPU-FPGA Architecture for Protein Identification with Tandem Mass Spectrometry. - Moucheng Yang; Tao Chen 005; Xuegong Zhou; Liang Zhao; Yunping Zhu; Lingli Wang (FPT, 2019)

ARBSA: Adaptive Range-Based Simulated Annealing for FPGA Placement. - Junqi Yuan; Jialing Chen; Lingli Wang; Xuegong Zhou; Yinshui Xia; Jianping Hu (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2019)

Fast Adjustable NPN Classification Using Generalized Symmetries. - Xuegong Zhou; Lingli Wang; Alan Mishchenko (ACM Trans. Reconfigurable Technol. Syst., 2019)

A Low-Cost Reconfigurable Nonlinear Core for Embedded DNN Applications. - Yue Li; Wei Cao 002; Xuegong Zhou; Lingli Wang (FPT, 2020)

GIB: A Novel Unidirectional Interconnection Architecture for FPGA. - Kaichuang Shi; Hao Zhou 008; Xuegong Zhou; Lingli Wang (FPT, 2020)

Fast Exact NPN Classification by Co-Designing Canonical Form and Its Computation Algorithm. - Xuegong Zhou; Lingli Wang; Alan Mishchenko (IEEE Trans. Computers, 2020)

FastCGRA: A Modeling, Evaluation, and Exploration Platform for Large-Scale Coarse-Grained Reconfigurable Arrays. - Su Zheng; Kaisen Zhang; Yaoguang Tian; Wenbo Yin; Lingli Wang; Xuegong Zhou (FPT, 2021)

MRI-based brain tumor segmentation using FPGA-accelerated neural network. - Siyu Xiong; Guoqing Wu 003; Xitian Fan; Xuan Feng; Zhongcheng Huang; Wei Cao 002; Xuegong Zhou; Shijin Ding; Jinhua Yu; Lingli Wang; Zhifeng Shi (BMC Bioinform., 2021)

Efficient Reinforcement Learning Framework for Automated Logic Synthesis Exploration. - Yu Qian; Xuegong Zhou; Hao Zhou 008; Lingli Wang (FPT, 2022)

AMG: Automated Efficient Approximate Multiplier Generator for FPGAs via Bayesian Optimization. - Zhen Li; Hao Zhou 008; Lingli Wang; Xuegong Zhou (ICFPT, 2023)

DSLUT: An Asymmetric LUT and its Automatic Design Flow Based on Practical Functions. - Moucheng Yang; Kaixiang Zhu; Lingli Wang; Xuegong Zhou (ICFPT, 2023)

An Optimized GIB Routing Architecture with Bent Wires for FPGA. - Kaichuang Shi; Xuegong Zhou; Hao Zhou 008; Lingli Wang (ACM Trans. Reconfigurable Technol. Syst., 2023)

An MLIR-Based Compiler for Hardware Acceleration with Recursion Support: (PhD Forum Paper). - Jiangnan Li; Zhengyi Zhang; Xuegong Zhou; Lingli Wang (ICFPT, 2024)

An Open-source End-to-End Logic Optimization Framework for Large-scale Boolean Network with Reinforcement Learning. - Zhen Li; Kaixiang Zhu; Xuegong Zhou; Lingli Wang (CoRR, 2024)

An Efficient Reinforcement Learning Based Framework for Exploring Logic Synthesis. - Yu Qian; Xuegong Zhou; Hao Zhou 008; Lingli Wang (ACM Trans. Design Autom. Electr. Syst., 2024)