An interactive graphics system for 2-D drawing and design. - Y. N. Srikant; D. Vidyasagar; Lalit M. Patnaik (Comput. Graph., 1982)

Graphical simulation of Petri Nets. - M. P. Subodh Kumar; Y. N. Srikant (Comput. Graph., 1986)

An Interpreter for SLIPS - An Applicative Language Based on Lambda-Calculus. - Vijay Gehlot; Y. N. Srikant (Comput. Lang., 1986)

Parallel parsing of programming languages. - Y. N. Srikant; Priti Shankar (Inf. Sci., 1987)

A new parallel algorithm for parsing arithmetic infix expressions. - Y. N. Srikant; Priti Shankar (Parallel Comput., 1987)

A Compiler Writing System Based on Affix Grammars. - H. K. Haripriyan; Y. N. Srikant; Priti Shankar (Comput. Lang., 1988)

Incremental Attribute Evaluation Through Recursive Procedures. - Arvind M. Murching; Y. N. Srikant (Comput. Lang., 1989)

A Class of Problems Efficiently Solvable on Mesh-Connected Computers Including Dynamic Expression Evaluation. - Alan Gibbons; Y. N. Srikant (Inf. Process. Lett., 1989)

Incremental Recursive Descent Parsing. - Arvind M. Murching; Y. V. Prasad; Y. N. Srikant (Comput. Lang., 1990)

Parallel Parsing of Arithmetic Expressions. - Y. N. Srikant (IEEE Trans. Computers, 1990)

Parallel Incremental LR Parsing. - V. Viswanathan; Y. N. Srikant (ICPP (3), 1991)

Linda Sub System on Transputers. - K. H. Shekhar; Y. N. Srikant (Comput. Lang., 1993)

Heuristic Chaining in Directed Acyclic Graphs. - R. Venugopal; Y. N. Srikant (Comput. Lang., 1993)

An Automatic Parallelization Framework for Multicomputers. - U. Nagaraj Shenoy; Y. N. Srikant; Vijay P. Bhatkar (Comput. Lang., 1994)

Parallel Incremental LR Parsing. - N. Viswanathan; Y. N. Srikant (Comput. Lang., 1994)

Scheduliing expression trees with register variables on delayed-load architectures. - R. Venugopal; Y. N. Srikant (Microprocess. Microprogramming, 1994)

Scheduling Expression Trees with Reusable Registers on Delayed-Load Architectures. - R. Venugopal; Y. N. Srikant (Comput. Lang., 1995)

Communication cost estimation and global data partitioning for distributed memory machines. - S. R. Prakash; Y. N. Srikant (HiPC, 1997)

An incremental basic block instruction scheduler. - R. Venugopal; Y. N. Srikant (J. Syst. Archit., 1998)

A Simple Algorithm for Partial Redundancy Elimination. - Vineeth Kumar Paleri; Y. N. Srikant; Priti Shankar (ACM SIGPLAN Notices, 1998)

Hyperplane Partitioning: An Approach to Global Data Partitioning for Distributed Memory Machines. - S. R. Prakash; Y. N. Srikant (IPPS/SPDP, 1999)

The complexity of certain incremental code generation problems. - R. Venugopal; Y. N. Srikant (Int. J. Comput. Math., 1999)

Automatic Data Partitioning by Hierarchical Genetic Search. - U. Nagaraj Shenoy; Y. N. Srikant; Vijay P. Bhatkar; Sandeep Kohli (Parallel Algorithms Appl., 1999)

Effective Parameterization of Architectural Registers for Register Allocation Alogorithms. - Y. N. Srikant; D. V. Ravindra (ACM SIGPLAN Notices, 2000)

A study of automatic migration of programs across the Java event models. - Bharath M. Kumar; R. Lakshminarayanan; Y. N. Srikant (ACM SIGSOFT Softw. Eng. Notes, 2000)

Scalar Compiler Optimizations on the Static Single Assignment Form and the Flow Graph. - Y. N. Srikant (The Compiler Design Handbook, 2002)

Improved Preprocessing Methods for Modulo Scheduling Algorithms. - D. V. Ravindra; Y. N. Srikant (HiPC, 2002)

Scheduling expression trees for delayed-load architectures. - R. Venugopal; Y. N. Srikant (J. Syst. Archit., 2002)

On the use of connector libraries in distributed software architectures. - Bharath Kumar M; Y. N. Srikant; R. Lakshminarayanan (ACM SIGSOFT Softw. Eng. Notes, 2002)

A Simple and Fast Scheme for Code Compression for VLIW Processors. - J. Prakash; C. Sandeep; Priti Shankar; Y. N. Srikant (DCC, 2003)

Dynamic recompilation and profile-guided optimisations for a .NET JIT compiler. - Kapil Vaswani; Y. N. Srikant (IEE Proc. Softw., 2003)

Partial redundancy elimination: a simple, pragmatic, and provably correct algorithm. - Vineeth Kumar Paleri; Y. N. Srikant; Priti Shankar (Sci. Comput. Program., 2003)

Integrated temporal and spatial scheduling for extended operand clustered VLIW processors. - Rahul Nagpal; Y. N. Srikant (Conf. Computing Frontiers, 2004)

A Graph Matching Based Integrated Scheduling Framework for Clustered VLIW Processors. - Rahul Nagpal; Y. N. Srikant (ICPP Workshops, 2004)

Transition aware scheduling: increasing continuous idle-periods in resource units. - K. Ananda Vardhan; Y. N. Srikant (Conf. Computing Frontiers, 2005)

A Programmable Hardware Path Profiler. - Kapil Vaswani; Matthew J. Thazhuthaveetil; Y. N. Srikant (CGO, 2005)

Genetic algorithm based automatic data partitioning scheme for HPF. - Sunil Kumar Anand; Y. N. Srikant (HPDC, 2005)

Compiler-assisted leakage energy optimization for clustered VLIW architectures. - Rahul Nagpal; Y. N. Srikant (EMSOFT, 2006)

Exploring Energy-Performance Trade-Offs for Heterogeneous Interconnect Clustered VLIW Processors. - Rahul Nagpal; Y. N. Srikant (HiPC, 2006)

Specification Based Regression Testing Using Explicit State Space Enumeration. - Sujit Kumar Chakrabarti; Y. N. Srikant (ICSEA, 2006)

Middleware for efficient power management in mobile devices. - H. S. Ashwini; Amit Thawani; Y. N. Srikant (Mobility Conference, 2006)

The Static Single Assignment Form: Construction and Application to Program Optimization. - Prakash Prabhu; Priti Shankar; Y. N. Srikant (The Compiler Design Handbook, 2nd ed., 2007)

Energy-Aware Compiler Optimizations. - Y. N. Srikant; K. Ananda Vardhan (The Compiler Design Handbook, 2nd ed., 2007)

INTACTE: an interconnect area, delay, and energy estimation tool for microarchitectural explorations. - Rahul Nagpal; Arvind Madan; Bharadwaj Amrutur; Y. N. Srikant (CASES, 2007)

Microarchitecture Sensitive Empirical Models for Compiler Optimizations. - Kapil Vaswani; Matthew J. Thazhuthaveetil; Y. N. Srikant; P. J. Joseph (CGO, 2007)

WCET estimation for executables in the presence of data caches. - Rathijit Sen; Y. N. Srikant (EMSOFT, 2007)

Compiler-Assisted Instruction Decoder Energy Optimization for Clustered VLIW Architectures. - Rahul Nagpal; Y. N. Srikant (HiPC, 2007)

Partial Flow Sensitivity. - Subhajit Roy 001; Y. N. Srikant (HiPC, 2007)

Executable Analysis using Abstract Interpretation with Circular Linear Progressions. - Rathijit Sen; Y. N. Srikant (MEMOCODE, 2007)

Register File Energy Optimization for Snooping Based Clustered VLIW Architectures. - Rahul Nagpal; Y. N. Srikant (SBAC-PAD, 2007)

Compiler-directed frequency and voltage scaling for a multiple clock domain microarchitecture. - Arun Rangasamy; Rahul Nagpal; Y. N. Srikant (Conf. Computing Frontiers, 2008)

Test sequence computation for regression testing of reactive systems. - Sujit Kumar Chakrabarti; Y. N. Srikant (ISEC, 2008)

Analysis of application partitioning for massively multiplayer mobile gaming. - Madan Kumar M. M; Amit Thawani; V. Sridhar; Y. N. Srikant (MOBILWARE, 2008)

Improving flow-insensitive solutions for non-separable dataflow problems. - Subhajit Roy 001; Y. N. Srikant (SAC, 2008)

Pragmatic integrated scheduling for clustered VLIW architectures. - Rahul Nagpal; Y. N. Srikant (Softw. Pract. Exp., 2008)

Profiling k-Iteration Paths: A Generalization of the Ball-Larus Profiling Algorithm. - Subhajit Roy 001; Y. N. Srikant (CGO, 2009)

Probabilistic modeling of data cache behavior. - Vinayak Puranik; Tulika Mitra; Y. N. Srikant (EMSOFT, 2009)

The Hot Path SSA Form: Extending the Static Single Assignment Form for Speculative Optimizations. - Subhajit Roy 001; Y. N. Srikant (CC, 2010)

Integrated energy-aware cyclic and acyclic scheduling for clustered VLIW processors. - Jimmy Bahuleyan; Rahul Nagpal; Y. N. Srikant (IPDPS Workshops, 2010)

Accelerating multi-core simulators. - Aparna Mandke Dani; Keshavan Varadarajan; Bharadwaj Amrutur; Y. N. Srikant (SAC, 2010)

Implications of Program Phase Behavior on Timing Analysis. - Archana Ravindar; Y. N. Srikant (Interaction between Compilers and Computer Architectures, 2011)

Evaluation of dynamic voltage and frequency scaling for stream programs. - Arun Rangasamy; Y. N. Srikant (Conf. Computing Frontiers, 2011)

Applying genetic algorithms to optimize the power in tiled SNUCA chip multicore architectures. - Aparna Mandke Dani; Bharadwaj Amrutur; Y. N. Srikant (SAC, 2011)

Petri net based performance modeling for effective DVFS for multithreaded programs. - Arun Rangasamy; Y. N. Srikant (SAC, 2011)

Probabilistic dataflow analysis using path profiles on structure graphs. - Arun Ramamurthi; Subhajit Roy 001; Y. N. Srikant (SIGSOFT FSE, 2011)

Relative roles of instruction count and cycles per instruction in WCET estimation. - Archana Ravindar; Y. N. Srikant (ICPE, 2011)

Compiler-assisted power optimization for clustered VLIW architectures. - Rahul Nagpal; Y. N. Srikant (Parallel Comput., 2011)

Relative roles of instruction count and cycles per instruction in WCET estimation (abstracts only). - Archana Ravindar; Y. N. Srikant (SIGMETRICS Perform. Evaluation Rev., 2011)

Estimation of probabilistic bounds on phase CPI and relevance in WCET analysis. - Archana Ravindar; Y. N. Srikant (EMSOFT, 2012)

Efficient cache exploration method for a tiled chip multiprocessor. - Aparna Mandke Dani; Y. N. Srikant; Bharadwaj Amrutur (HiPC, 2012)

Interdependent cache analyses for better precision and safety. - Kartik Nagar; Y. N. Srikant (MEMOCODE, 2012)

TCP: Thread Contention Predictor for Parallel Programs. - Aparna Mandke Dani; Bharadwaj Amrutur; Y. N. Srikant; Chiranjib Bhattacharyya (PDP, 2012)

Compiler-assisted energy optimization for clustered VLIW processors. - Rahul Nagpal; Y. N. Srikant (J. Parallel Distributed Comput., 2012)

Precise shared cache analysis using optimal interference placement. - Kartik Nagar; Y. N. Srikant (RTAS, 2014)

Exploiting critical data regions to reduce data cache energy consumption. - K. Ananda Vardhan; Y. N. Srikant (SCOPES, 2014)

Toward a Scalable Working Set Size Estimation Method and Its Application for Chip Multiprocessors. - Aparna Mandke Dani; Bharadwaj Amrutur; Y. N. Srikant (IEEE Trans. Computers, 2014)

Efficient Compilation of Stream Programs for Heterogeneous Architectures: A Model-Checking based approach. - Rajesh Kumar Thakur; Y. N. Srikant (SCOPES, 2015)

Path Sensitive Cache Analysis Using Cache Miss Paths. - Kartik Nagar; Y. N. Srikant (VMCAI, 2015)

Asynchrony-aware static analysis of Android applications. - Ashish Mishra 002; Aditya Kanade 001; Y. N. Srikant (MEMOCODE, 2016)

Falcon: A Graph Manipulation Language for Heterogeneous Systems. - Unnikrishnan C.; Rupesh Nasre; Y. N. Srikant (ACM Trans. Archit. Code Optim., 2016)

Fast and Precise Worst-Case Interference Placement for Shared Cache Analysis. - Kartik Nagar; Y. N. Srikant (ACM Trans. Embed. Comput. Syst., 2016)

DH-Falcon: A Language for Large-Scale Graph Processing on Distributed Heterogeneous Systems. - Unnikrishnan Cheramangalath; Rupesh Nasre; Y. N. Srikant (CLUSTER, 2017)

Large Scale Graph Processing in a Distributed Environment. - Nitesh Upadhyay; Parita Patel; Unnikrishnan Cheramangalath; Y. N. Srikant (Euro-Par Workshops, 2017)

Beyond-Regular Typestate. - Ashish Mishra 002; Y. N. Srikant (CoRR, 2017)

Presburger-Definable Parameterized Typestates. - Ashish Mishra 002; Deepak D'Souza; Y. N. Srikant (CoRR, 2017)

Refining Cache Behavior Prediction Using Cache Miss Paths. - Kartik Nagar; Y. N. Srikant (ACM Trans. Embed. Comput. Syst., 2017)

IR2Vec: A Flow Analysis based Scalable Infrastructure for Program Encodings. - Venkata Keerthy S; Rohit Aggarwal; Shalini Jain 002; Maunendra Sankar Desarkar; Ramakrishna Upadrasta; Y. N. Srikant (CoRR, 2019)

Distributed Graph Analytics - Programming, Languages, and Their Compilation - Unnikrishnan Cheramangalath; Rupesh Nasre; Y. N. Srikant (Springer, 2020)

Distributed Graph Analytics. - Y. N. Srikant (ICDCIT, 2020)

IR2VEC: LLVM IR Based Scalable Program Embeddings. - S. VenkataKeerthy; Rohit Aggarwal; Shalini Jain 002; Maunendra Sankar Desarkar; Ramakrishna Upadrasta; Y. N. Srikant (ACM Trans. Archit. Code Optim., 2020)