A new NDA timing error detector for BPSK and QPSK with an efficient hardware implementation for ASIC-based and FPGA-based wireless receivers. - Yair Linn (ISCAS (4), 2004)

Quantitative analysis of a new method for real-time generation of SNR estimates for digital phase modulation signals. - Yair Linn (IEEE Trans. Wirel. Commun., 2004)

A family of self-normalizing carrier lock detectors and ES/N0 estimators for M-PSK and other phase Modulation schemes. - Yair Linn; Nir Peleg (IEEE Trans. Wirel. Commun., 2004)

A Novel Method for Travel-Time Measurement for Geophysical Inversion Problems. - Matthew J. Yedlin; Yair Linn (IGARSS, 2006)

An Optimal Adaptive M-PSK Carrier Phase Detector Suitable for Fixed-Point Hardware Implementation within FPGAs and ASICs. - Yair Linn (SiPS, 2006)

A self-normalizing symbol synchronization lock detector for QPSK and BPSK. - Yair Linn (IEEE Trans. Wirel. Commun., 2006)

Efficient loop filter design in FPGAs for Phase Lock Loops in high-datarate wireless receivers - theory and case study. - Yair Linn (WTS, 2007)

A Carrier-Independent Non-Data-Aided Real-Time SNR Estimator for M-PSK and D-MPSK Suitable for FPGAs and ASICs. - Yair Linn (IEEE Trans. Circuits Syst. I Regul. Pap., 2009)

Robust M-PSK phase detectors for carrier synchronization PLLs in coherent receivers: theory and simulations. - Yair Linn (IEEE Trans. Commun., 2009)

An Ultra Low Cost Wireless Communications Laboratory for Education and Research. - Yair Linn (IEEE Trans. Educ., 2012)

New structures for modulation classification and SNR estimation with applications to Cognitive Radio and Software Defined Radio. - Yair Linn (CCECE, 2014)

Efficient M-PSK lock detectors and SNR estimators. - Yair Linn (CCECE, 2014)