Temporofunctional crosstalk noise analysis. - Donald Chai; Alex Kondratyev; Yajun Ran; Kenneth H. Tseng; Yosinori Watanabe; Malgorzata Marek-Sadowska (DAC, 2003)

Crosstalk noise in FPGAs. - Yajun Ran; Malgorzata Marek-Sadowska (DAC, 2003)

Designing a via-configurable regular fabric. - Yajun Ran; Malgorzata Marek-Sadowska (CICC, 2004)

On designing via-configurable cell blocks for regular fabrics. - Yajun Ran; Malgorzata Marek-Sadowska (DAC, 2004)

Eliminating False Positives in Crosstalk Noise Analysis. - Yajun Ran; Alex Kondratyev; Yosinori Watanabe; Malgorzata Marek-Sadowska (DATE, 2004)

An integrated design flow for a via-configurable gate array. - Yajun Ran; Malgorzata Marek-Sadowska (ICCAD, 2004)

The Magic of a Via-Configurable Regular Fabric. - Yajun Ran; Malgorzata Marek-Sadowska (ICCD, 2004)

Eliminating false positives in crosstalk noise analysis. - Yajun Ran; Alex Kondratyev; Kenneth H. Tseng; Yosinori Watanabe; Malgorzata Marek-Sadowska (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2005)

General skew constrained clock network sizing based on sequential linear programming. - Kai Wang 011; Yajun Ran; Hailin Jiang; Malgorzata Marek-Sadowska (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2005)

Designing via-configurable logic blocks for regular fabric. - Yajun Ran; Malgorzata Marek-Sadowska (IEEE Trans. Very Large Scale Integr. Syst., 2006)

Via-Configurable Routing Architectures and Fast Design Mappability Estimation for Regular Fabrics. - Yajun Ran; Malgorzata Marek-Sadowska (IEEE Trans. Very Large Scale Integr. Syst., 2006)

Context-specific leakage and delay analysis of a 65nm standard cell library for lithography-induced variability. - Darsun Tsiena; Chien Kuo Wang; William W. J. Wang; Yajun Ran; Philippe Hurat; Nishath Verghese (SoCC, 2007)