A 0.4V 2.02fJ/conversion-step 10-bit hybrid SAR ADC with time-domain quantizer in 90nm CMOS. - Yan-Jiun Chen; Chih-Cheng Hsieh (VLSIC, 2014)

An 8-bit column-shared SAR ADC for CMOS image sensor applications. - Jin-Yi Lin; Kwuang-Han Chang; Chen-Che Kao; Shih-Chin Lo; Yan-Jiun Chen; Pei-Chen Lee; Chi-Hui Chen; Chin Yin; Chih-Cheng Hsieh (ISCAS, 2015)

A 2.02-5.16 fJ/Conversion Step 10 Bit Hybrid Coarse-Fine SAR ADC With Time-Domain Quantizer in 90 nm CMOS. - Yan-Jiun Chen; Kwuang-Han Chang; Chih-Cheng Hsieh (IEEE J. Solid State Circuits, 2016)

Toward Automotive Surround-View Radars. - Chih-Ming Hung; Alex T. C. Lin; B. C. Peng; Hua Wang; Jui-Lin Hsu; Yen-Ju Lu; Wei-Show Hsu; Jing-Hong Conan Zhan; Brian Juan; Chi-Hang Lok; Sam Lee; P. C. Hsiao; et al. (ISSCC, 2019)