Highly Linear RF CMOS Variable Attenuators With Adaptive Body Biasing. - Yan-Yu Huang; Wangmyong Woo; Youngchang Yoon; Chang-Ho Lee (IEEE J. Solid State Circuits, 2011)

A Triple-Mode Balanced Linear CMOS Power Amplifier Using a Switched-Quadrature Coupler. - Hamhee Jeon; Yunseo Park; Yan-Yu Huang; Jihwan Kim; Kun-Seok Lee; Chang-Ho Lee; J. Stevenson Kenney (IEEE J. Solid State Circuits, 2012)

A Fully-Integrated High-Power Linear CMOS Power Amplifier With a Parallel-Series Combining Transformer. - Jihwan Kim; Woonyun Kim; Hamhee Jeon; Yan-Yu Huang; Youngchang Yoon; Hyungwook Kim; Chang-Ho Lee; Kevin T. Kornegay (IEEE J. Solid State Circuits, 2012)

A 2GHz-to-7.5GHz quadrature clock-generator using digital delay locked loops for multi-standard I/Os in 14nm CMOS. - Amr Elshazly; Ajay Balankutty; Yan-Yu Huang; Kai Yu 016; Frank O'Mahony (VLSIC, 2014)

3.5 A 16-to-40Gb/s quarter-rate NRZ/PAM4 dual-mode transmitter in 14nm CMOS. - Jihwan Kim; Ajay Balankutty; Amr Elshazly; Yan-Yu Huang; Hang Song; Kai Yu 016; Frank O'Mahony (ISSCC, 2015)

An ultra-high-density 256-channel/25mm2 neural sensing microsystem using TSV-embedded neural probes. - Yu-Chieh Huang; Po-Tsang Huang; Shang-Lin Wu; Yu-Chen Hu; Yan-Huei You; Ming Chen; Yan-Yu Huang; Hsiao-Chun Chang; Yen-Han Lin; Jeng-Ren Duann; Tzai-Wen Chiu; Wei Hwang; et al. (ISCAS, 2016)

Ultrahigh-Density 256-Channel Neural Sensing Microsystem Using TSV-Embedded Neural Probes. - Yu-Chieh Huang; Po-Tsang Huang; Shang-Lin Wu; Yu-Chen Hu; Yan-Huei You; Ming Chen; Yan-Yu Huang; Hsiao-Chun Chang; Yen-Han Lin; Jeng-Ren Duann; Tzai-Wen Chiu; Wei Hwang; et al. (IEEE Trans. Biomed. Circuits Syst., 2017)