Robot Chain Based Self-organizing Search Method of Swarm Robotics. - Yandong Luo; Jianwen Guo; Zhibin Zeng; Chengzhi Chen; Xiaoyan Li; Jiapeng Wu (ICIC (1), 2018)

MLP+NeuroSimV3.0: Improving On-chip Learning Performance with Device to Algorithm Optimizations. - Yandong Luo; Xiaochen Peng; Shimeng Yu (ICONS, 2019)

Monolithically Integrated RRAM- and CMOS-Based In-Memory Computing Optimizations for Efficient Deep Learning. - Shihui Yin; Jae-sun Seo; Yulhwa Kim; Xu Han; Hugh J. Barnaby; Shimeng Yu; Yandong Luo; Wangxin He; Xiaoyu Sun 001; Jae-Joon Kim (IEEE Micro, 2019)

Benchmark Non-volatile and Volatile Memory Based Hybrid Precision Synapses for In-situ Deep Neural Network Training. - Yandong Luo; Shimeng Yu (ASP-DAC, 2020)

Impact of Read Disturb on Multilevel RRAM based Inference Engine: Experiments and Model Prediction. - Wonbo Shim; Yandong Luo; Jae-sun Seo; Shimeng Yu (IRPS, 2020)

A Variation Robust Inference Engine Based on STT-MRAM with Parallel Read-Out. - Yandong Luo; Xiaochen Peng; Ryan Hatcher; Titash Rakshit; Jorge Kittl; Mark S. Rodder; Jae-Sun Seo; Shimeng Yu (ISCAS, 2020)

Accelerating Deep Neural Network In-Situ Training With Non-Volatile and Volatile Memory Based Hybrid Precision Synapses. - Yandong Luo; Shimeng Yu (IEEE Trans. Computers, 2020)

Benchmark of the Compute-in-Memory-Based DNN Accelerator With Area Constraint. - Anni Lu; Xiaochen Peng; Yandong Luo; Shimeng Yu (IEEE Trans. Very Large Scale Integr. Syst., 2020)

Thermal Reliability Considerations of Resistive Synaptic Devices for 3D CIM System Performance. - Ankit Kaul; Yandong Luo; Xiaochen Peng; Shimeng Yu; Muhannad S. Bakir (3DIC, 2021)

A Runtime Reconfigurable Design of Compute-in-Memory based Hardware Accelerator. - Anni Lu; Xiaochen Peng; Yandong Luo; Shanshi Huang; Shimeng Yu (DATE, 2021)

A FeRAM based Volatile/Non-volatile Dual-mode Buffer Memory for Deep Neural Network Training. - Yandong Luo; Yuan-Chun Luo; Shimeng Yu (DATE, 2021)

Exploiting Process Variations to Protect Machine Learning Inference Engine from Chip Cloning. - Shanshi Huang; Xiaochen Peng; Hongwu Jiang; Yandong Luo; Shimeng Yu (ISCAS, 2021)

Swarm Robot Exploration Strategy for Path Formation Tasks Inspired by Physarum polycephalum. - Yandong Luo; Jianwen Guo; Zhenpeng Lao; Shaohui Zhang; Xiaohui Yan (Complex., 2021)

AILC: Accelerate On-Chip Incremental Learning With Compute-in-Memory Technology. - Yandong Luo; Shimeng Yu (IEEE Trans. Computers, 2021)

RRAM for Compute-in-Memory: From Inference to Training. - Shimeng Yu; Wonbo Shim; Xiaochen Peng; Yandong Luo (IEEE Trans. Circuits Syst. I Regul. Pap., 2021)

A Runtime Reconfigurable Design of Compute-in-Memory-Based Hardware Accelerator for Deep Learning Inference. - Anni Lu; Xiaochen Peng; Yandong Luo; Shanshi Huang; Shimeng Yu (ACM Trans. Design Autom. Electr. Syst., 2021)

Performance Benchmarking of Spin-Orbit Torque Magnetic RAM (SOT-MRAM) for Deep Neural Network (DNN) Accelerators. - Yandong Luo; Piyush Kumar; Yu-Ching Liao; William Hwang; Fen Xue; Wilman Tsai; Shan X. Wang; Azad Naeemi; Shimeng Yu (IMW, 2022)

A Compute-in-Memory Hardware Accelerator Design With Back-End-of-Line (BEOL) Transistor Based Reconfigurable Interconnect. - Yandong Luo; Sourav Dutta; Ankit Kaul; Sung Kyu Lim; Muhannad S. Bakir; Suman Datta; Shimeng Yu (IEEE J. Emerg. Sel. Topics Circuits Syst., 2022)

Accelerating On-Chip Training with Ferroelectric-Based Hybrid Precision Synapse. - Yandong Luo; Panni Wang; Shimeng Yu (ACM J. Emerg. Technol. Comput. Syst., 2022)

A Ferroelectric-Based Volatile/Non-Volatile Dual-Mode Buffer Memory for Deep Neural Network Accelerators. - Yandong Luo; Yuan-Chun Luo; Shimeng Yu (IEEE Trans. Computers, 2022)

Robust Processing-In-Memory With Multibit ReRAM Using Hessian-Driven Mixed-Precision Computation. - Saurabh Dash; Yandong Luo; Anni Lu; Shimeng Yu; Saibal Mukhopadhyay (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022)

RAWAtten: Reconfigurable Accelerator for Window Attention in Hierarchical Vision Transformers. - Wantong Li; Yandong Luo; Shimeng Yu (DATE, 2023)

Co-Optimization for Robust Power Delivery Design in 3D-Heterogeneous Integration of Compute In-Memory Accelerators. - Ankit Kaul; Madison Manley; James Read; Yandong Luo; Xiaochen Peng; Shimeng Yu; Muhannad S. Bakir (VLSI Technology and Circuits, 2024)

A FeFET-Based ADC Offset Robust Compute-In-Memory Architecture for Streaming Keyword Spotting (KWS). - Yandong Luo; Johan Vanderhaegen; Oleg Rybakov; Martin Kraemer; Niel Warren; Shimeng Yu (IEEE Trans. Emerg. Top. Comput., 2024)

Energy-efficient On-chip Deep Neural Network (DNN) Inference and Training with Emerging Non-volatile Memory Technologies. - Yandong Luo (2024)

H3D-Transformer: A Heterogeneous 3D (H3D) Computing Platform for Transformer Model Acceleration on Edge Devices. - Yandong Luo; Shimeng Yu (ACM Trans. Design Autom. Electr. Syst., 2024)

Endurance-Aware Compiler for 3-D Stackable FeRAM as Global Buffer in TPU-Like Architecture. - Yuan-Chun Luo; Anni Lu; Yandong Luo; Sou-Chi Chang; Uygar Avci; Shimeng Yu (IEEE Trans. Very Large Scale Integr. Syst., 2024)