High-density integration of functional modules using monolithic 3D-IC technology. - Shreepad Panth; Kambiz Samadi; Yang Du 001; Sung Kyu Lim (ASP-DAC, 2013)

Power-Performance Study of Block-Level Monolithic 3D-ICs Considering Inter-Tier Performance Variations. - Shreepad Panth; Kambiz Samadi; Yang Du 001; Sung Kyu Lim (DAC, 2014)

Fast and Accurate Thermal Modeling and Optimization for Monolithic 3D ICs. - Sandeep Kumar Samal; Shreepad Panth; Kambiz Samadi; Mehdi Saedi; Yang Du 001; Sung Kyu Lim (DAC, 2014)

Full chip impact study of power delivery network designs in monolithic 3D ICs. - Sandeep Kumar Samal; Kambiz Samadi; Pratyush Kamal; Yang Du 001; Sung Kyu Lim (ICCAD, 2014)

Design and CAD methodologies for low power gate-level monolithic 3D ICs. - Shreepad A. Panth; Kambiz Samadi; Yang Du 001; Sung Kyu Lim (ISLPED, 2014)

3DIC benefit estimation and implementation guidance from 2DIC implementation. - Wei-Ting Jonas Chan; Siddhartha Nath; Andrew B. Kahng; Yang Du 001; Kambiz Samadi (DAC, 2015)

Tier-partitioning for power delivery vs cooling tradeoff in 3D VLSI for mobile applications. - Shreepad Panth; Kambiz Samadi; Yang Du 001; Sung Kyu Lim (DAC, 2015)

3D VLSI: A Scalable Integration Beyond 2D. - Karim Arabi; Kambiz Samadi; Yang Du 001 (ISPD, 2015)

Placement-Driven Partitioning for Congestion Mitigation in Monolithic 3D IC Designs. - Shreepad Panth; Kambiz Samadi; Yang Du 001; Sung Kyu Lim (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2015)

BEOL stack-aware routability prediction from placement using data mining techniques. - Wei-Ting Jonas Chan; Yang Du 001; Andrew B. Kahng; Siddhartha Nath; Kambiz Samadi (ICCD, 2016)

Adaptive Regression-Based Thermal Modeling and Optimization for Monolithic 3-D ICs. - Sandeep Kumar Samal; Shreepad Panth; Kambiz Samadi; Mehdi Saedi; Yang Du 001; Sung Kyu Lim (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2016)

Shrunk-2-D: A Physical Design Methodology to Build Commercial-Quality Monolithic 3-D ICs. - Shreepad Panth; Kambiz Samadi; Yang Du 001; Sung Kyu Lim (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2017)

Tier Degradation of Monolithic 3-D ICs: A Power Performance Study at Different Technology Nodes. - Shreepad Panth; Sandeep Kumar Samal; Kambiz Samadi; Yang Du 001; Sung Kyu Lim (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2017)

Full Chip Impact Study of Power Delivery Network Designs in Gate-Level Monolithic 3-D ICs. - Sandeep Kumar Samal; Kambiz Samadi; Pratyush Kamal; Yang Du 001; Sung Kyu Lim (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2017)