STC: Significance-aware Transform-based Codec Framework for External Memory Access Reduction. - Feng Xiong; Fengbin Tu; Man Shi; Yang Wang 089; Leibo Liu; Shaojun Wei; Shouyi Yin (DAC, 2020)

LPE: Logarithm Posit Processing Element for Energy-Efficient Edge-Device Training. - Yang Wang 089; Dazheng Deng; Leibo Liu; Shaojun Wei; Shouyi Yin (AICAS, 2021)

HPPU: An Energy-Efficient Sparse DNN Training Processor with Hybrid Weight Pruning. - Yang Wang 089; Yubin Qin; Leibo Liu; Shaojun Wei; Shouyi Yin (AICAS, 2021)

Learnable Quantization Loss Function Based on Expectation. - Hao Sun; Yujuan Cheng; Yang Wang 089; Bin Wang; Shouyi Yin (ICAC, 2021)

A 28nm 276.55TFLOPS/W Sparse Deep-Neural-Network Training Processor with Implicit Redundancy Speculation and Batch Normalization Reformulation. - Yang Wang 089; Yubin Qin; Dazheng Deng; Jingchuan Wei; Tianbao Chen; Xinhan Lin; Leibo Liu; Shaojun Wei; Shouyi Yin (VLSI Circuits, 2021)

Evolver: A Deep Learning Processor With On-Device Quantization-Voltage-Frequency Tuning. - Fengbin Tu; Weiwei Wu; Yang Wang 089; Hongjiang Chen; Feng Xiong; Man Shi; Ning Li; Jinyi Deng; Tianbao Chen; Leibo Liu; Shaojun Wei; Yuan Xie 001; et al. (IEEE J. Solid State Circuits, 2021)

Erratum to "Evolver: a Deep Learning Processor With On-Device Quantization-Voltage-Frequency Tuning". - Fengbin Tu; Weiwei Wu; Yang Wang 089; Hongjiang Chen; Feng Xiong; Man Shi; Ning Li; Jinyi Deng; Tianbao Chen; Leibo Liu; Shaojun Wei; Yuan Xie 001; et al. (IEEE J. Solid State Circuits, 2021)

A 28nm 27.5TOPS/W Approximate-Computing-Based Transformer Processor with Asymptotic Sparsity Speculating and Out-of-Order Computing. - Yang Wang 089; Yubin Qin; Dazheng Deng; Jingchuan Wei; Yang Zhou; Yuanqi Fan; Tianbao Chen; Hao Sun; Leibo Liu; Shaojun Wei; Shouyi Yin (ISSCC, 2022)

FAQS: Communication-efficient Federate DNN Architecture and Quantization Co-Search for personalized Hardware-aware Preferences. - Hongjiang Chen; Yang Wang 089; Leibo Liu; Shaojun Wei; Shouyi Yin (CoRR, 2022)

HQNAS: Auto CNN deployment framework for joint quantization and architecture search. - Hongjiang Chen; Yang Wang 089; Leibo Liu; Shaojun Wei; Shouyi Yin (CoRR, 2022)

Trainer: An Energy-Efficient Edge-Device Training Processor Supporting Dynamic Weight Pruning. - Yang Wang 089; Yubin Qin; Dazheng Deng; Jingchuan Wei; Tianbao Chen; Xinhan Lin; Leibo Liu; Shaojun Wei; Shouyi Yin (IEEE J. Solid State Circuits, 2022)

PL-NPU: An Energy-Efficient Edge-Device DNN Training Processor With Posit-Based Logarithm-Domain Computing. - Yang Wang 089; Dazheng Deng; Leibo Liu; Shaojun Wei; Shouyi Yin (IEEE Trans. Circuits Syst. I Regul. Pap., 2022)

SWPU: A 126.04 TFLOPS/W Edge-Device Sparse DNN Training Processor With Dynamic Sub-Structured Weight Pruning. - Yang Wang 089; Yubin Qin; Leibo Liu; Shaojun Wei; Shouyi Yin (IEEE Trans. Circuits Syst. I Regul. Pap., 2022)

CIMFormer: A 38.9TOPS/W-8b Systolic CIM-Array Based Transformer Processor with Token-Slimmed Attention Reformulating and Principal Possibility Gathering. - Ruiqi Guo; Yang Wang 089; Xiaofeng Chen; Lei Wang; Hao Sun; Jingchuan Wei; Leibo Liu; Shaojun Wei; Yang Hu 001; Shouyi Yin (A-SSCC, 2023)

A 28nm 49.7TOPS/W Sparse Transformer Processor with Random-Projection-Based Speculation, Multi-Stationary Dataflow, and Redundant Partial Product Elimination. - Yubin Qin; Yang Wang 089; Dazheng Deng; Xiaolong Yang; Zhiren Zhao; Yang Zhou; Yuanqi Fan; Jingchuan Wei; Tianbao Chen; Leibo Liu; Shaojun Wei; Yang Hu 001; et al. (A-SSCC, 2023)

FACT: FFN-Attention Co-optimized Transformer Architecture with Eager Correlation Prediction. - Yubin Qin; Yang Wang 089; Dazheng Deng; Zhiren Zhao; Xiaolong Yang; Leibo Liu; Shaojun Wei; Yang Hu 001; Shouyi Yin (ISCA, 2023)

CV-CIM: A 28nm XOR-Derived Similarity-Aware Computation-in-Memory for Cost-Volume Construction. - Zhiheng Yue; Yang Wang 089; Huizheng Wang; Yabing Wang; Ruiqi Guo; Limei Tang; Leibo Liu; Shaojun Wei; Yang Hu 001; Shouyi Yin (ISSCC, 2023)

A 28nm 77.35TOPS/W Similar Vectors Traceable Transformer Processor with Principal-Component-Prior Speculating and Dynamic Bit-wise Stationary Computing. - Yang Wang 089; Yubin Qin; Dazheng Deng; Xiaolong Yang; Zhiren Zhao; Ruiqi Guo; Zhiheng Yue; Leibo Liu; Shaojun Wei; Yang Hu 001; Shouyi Yin (VLSI Technology and Circuits, 2023)

An Energy-Efficient Transformer Processor Exploiting Dynamic Weak Relevances in Global Attention. - Yang Wang 089; Yubin Qin; Dazheng Deng; Jingchuan Wei; Yang Zhou; Yuanqi Fan; Tianbao Chen; Hao Sun; Leibo Liu; Shaojun Wei; Shouyi Yin (IEEE J. Solid State Circuits, 2023)

Reconfigurability, Why It Matters in AI Tasks Processing: A Survey of Reconfigurable AI Chips. - Shaojun Wei; Xinhan Lin; Fengbin Tu; Yang Wang 089; Leibo Liu; Shouyi Yin (IEEE Trans. Circuits Syst. I Regul. Pap., 2023)

A 28nm 118.26TOPS/W Multi-Dimensional Fault-Tolerant Al Processor Enabling Voltage-Frequency Scaling Below Point-of-First-Failure. - Yang Wang 089; Xiaolong Yang; Yubin Qin; Zhiren Zhao; Ruiqi Guo; Zhiheng Yue; Shaojun Wei; Yang Hu 001; Shouyi Yin (A-SSCC, 2024)

A 28nm 314.6TLFOPS/W Reconfigurable Floating-Point Analog Compute-In-Memory Macro with Exponent Approximation and Two-Stage Sharing TD-ADC. - Pengyu He; Yuanzhe Zhao; Heng Xie; Yang Wang 089; Shouyi Yin; Li Li 064; Yan Zhu 001; Rui Paulo Martins; Chi-Hang Chan; Minglei Zhang (CICC, 2024)

FQP: A Fibonacci Quantization Processor with Multiplication-Free Computing and Topological-Order Routing. - Xiaolong Yang; Yang Wang 089; Yubin Qin; Jiachen Wang; Shaojun Wei; Yang Hu 001; Shouyi Yin (DAC, 2024)

MECLA: Memory-Compute-Efficient LLM Accelerator with Scaling Sub-matrix Partition. - Yubin Qin; Yang Wang 089; Zhiren Zhao; Xiaolong Yang; Yang Zhou; Shaojun Wei; Yang Hu 001; Shouyi Yin (ISCA, 2024)

Exploiting Similarity Opportunities of Emerging Vision AI Models on Hybrid Bonding Architecture. - Zhiheng Yue; Huizheng Wang; Jiahao Fang; Jinyi Deng; Guangyang Lu; Fengbin Tu; Ruiqi Guo; Yuxuan Li; Yubin Qin; Yang Wang 089; Chao Li 009; Huiming Han; et al. (ISCA, 2024)

20.2 A 28nm 74.34TFLOPS/W BF16 Heterogenous CIM-Based Accelerator Exploiting Denoising-Similarity for Diffusion Models. - Ruiqi Guo; Lei Wang; Xiaofeng Chen; Hao Sun; Zhiheng Yue; Yubin Qin; Huiming Han; Yang Wang 089; Fengbin Tu; Shaojun Wei; Yang Hu 001; Shouyi Yin (ISSCC, 2024)

34.1 A 28nm 83.23TFLOPS/W POSIT-Based Compute-in-Memory Macro for High-Accuracy AI Applications. - Yang Wang 089; Xiaolong Yang; Yubin Qin; Zhiren Zhao; Ruiqi Guo; Zhiheng Yue; Huiming Han; Shaojun Wei; Yang Hu 001; Shouyi Yin (ISSCC, 2024)

15.1 A 0.795fJ/bit Physically-Unclonable Function-Protected TCAM for a Software-Defined Networking Switch. - Zhiheng Yue; Xujiang Xiang; Fengbin Tu; Yang Wang 089; Yiming Wang; Shaojun Wei; Yang Hu 001; Shouyi Yin (ISSCC, 2024)

SOFA: A Compute-Memory Optimized Sparsity Accelerator via Cross-Stage Coordinated Tiling. - Huizheng Wang; Jiahao Fang; Xinru Tang; Zhiheng Yue; Jinxi Li; Yubin Qin; Sihan Guan; Qinze Yang; Yang Wang 089; Chao Li 009; Yang Hu 001; Shouyi Yin (MICRO, 2024)

A 22nm 54.94TFLOPS/W Transformer Fine-Tuning Processor with Exponent-Stationary Re-Computing, Aggressive Linear Fitting, and Logarithmic Domain Multiplicating. - Yang Wang 089; Xiaolong Yang; Yubin Qin; Zhiren Zhao; Ruiqi Guo; Zhiheng Yue; Huiming Han; Shaojun Wei; Yang Hu 001; Shouyi Yin (VLSI Technology and Circuits, 2024)

A 52.01 TFLOPS/W Diffusion Model Processor with Inter-Time-Step Convolution-Attention-Redundancy Elimination and Bipolar Floating-Point Multiplication. - Yubin Qin; Yang Wang 089; Xiaolong Yang; Zhiren Zhao; Shaojun Wei; Yang Hu 001; Shouyi Yin (VLSI Technology and Circuits, 2024)

SOFA: A Compute-Memory Optimized Sparsity Accelerator via Cross-Stage Coordinated Tiling. - Huizheng Wang; Jiahao Fang; Xinru Tang; Zhiheng Yue; Jinxi Li; Yubin Qin; Sihan Guan; Qize Yang; Yang Wang 089; Chao Li 009; Yang Hu 001; Shouyi Yin (CoRR, 2024)

CIMFormer: A Systolic CIM-Array-Based Transformer Accelerator With Token-Pruning-Aware Attention Reformulating and Principal Possibility Gathering. - Ruiqi Guo; Xiaofeng Chen; Lei Wang; Yang Wang 089; Hao Sun; Jingchuan Wei; Huiming Han; Leibo Liu; Shaojun Wei; Yang Hu 001; Shouyi Yin (IEEE J. Solid State Circuits, 2024)

Ayaka: A Versatile Transformer Accelerator With Low-Rank Estimation and Heterogeneous Dataflow. - Yubin Qin; Yang Wang 089; Dazheng Deng; Xiaolong Yang; Zhiren Zhao; Yang Zhou; Yuanqi Fan; Jingchuan Wei; Tianbao Chen; Leibo Liu; Shaojun Wei; Yang Hu 001; et al. (IEEE J. Solid State Circuits, 2024)

A 28nm Value-Wise Hybrid-Domain Compute-in-Memory Macro with Heterogeneous Memory Fabric and Asynchronous Sparsity Manager. - Yuanzhe Zhao; Yang Wang 089; Yuheng Wang; Heng Xie; Yan Zhu 001; Rui Paulo Martins; Chi-Hang Chan; Shouyi Yin; Minglei Zhang (CICC, 2025)

23.8 An 88.36TOPS/W Bit-Level-Weight-Compressed Large-Language-Model Accelerator with Cluster-Aligned INT-FP-GEMM and Bi-Dimensional Workflow Reformulation. - Yubin Qin; Yang Wang 089; Jiachen Wang; Zhiwei Lin; Yushu Zhao; Shaojun Wei; Yang Hu 001; Shouyi Yin (ISSCC, 2025)

14.4 A 51.6TFLOPs/W Full-Datapath CIM Macro Approaching Sparsity Bound and <-30 Loss for Compound AI. - Zhiheng Yue; Xujiang Xiang; Yang Wang 089; Ruiqi Guo; Huiming Han; Shaojun Wei; Yang Hu 001; Shouyi Yin (ISSCC, 2025)

A 28-nm 28.8-TOPS/W Attention-Based NN Processor With Correlative CIM Ring Architecture and Dataflow-Reshaped Digital-Assisted CIM Array. - Ruiqi Guo; Zhiheng Yue; Yang Wang 089; Hao Li; Te Hu; Yabing Wang; Hao Sun; Jeng-Long Hsu; Yaojun Zhang; Bonan Yan; Leibo Liu; Ru Huang 001; et al. (IEEE J. Solid State Circuits, 2025)

CV-CIM: A Hybrid Domain Xor-Derived Similarity-Aware Computation-in-Memory Supporting Cost-Volume Construction. - Zhiheng Yue; Yang Wang 089; Huizheng Wang; Ruiqi Guo; Fengbin Tu; Jianxun Yang; Shaojun Wei; Yang Hu 001; Shouyi Yin (IEEE J. Solid State Circuits, 2025)

BeaCIM: A Digital Compute-in-Memory DNN Processor With Bi-Directional Exponent Alignment for FP8 Training. - Yang Zhou; Yang Wang 089; Wenxin Yin; Yazheng Jiang; Jingchuan Wei; Yubin Qin; Yang Hu 001; Shaojun Wei; Shouyi Yin (IEEE Trans. Circuits Syst. II Express Briefs, 2025)

An Energy-Efficient POSIT Compute-in-Memory Macro for High-Accuracy AI Applications. - Yang Wang 089; Xiaolong Yang; Yubin Qin; Zhiren Zhao; Ruiqi Guo; Zhiheng Yue; Huiming Han; Shaojun Wei; Yang Hu 001; Shouyi Yin (IEEE J. Solid State Circuits, 2025)