FPGA-accelerator system for computing biologically inspired feature extraction models. - Michael DeBole; Yang Xiao 002; Chi-Li Yu; Ahmed Al-Maashri; Matthew Cotter; Chaitali Chakrabarti; Vijaykrishnan Narayanan (ACSCC, 2011)

Low power memristor-based ReRAM design with Error Correcting Code. - Dimin Niu; Yang Xiao 002; Yuan Xie 001 (ASP-DAC, 2012)

Accelerating neuromorphic vision algorithms for recognition. - Ahmed Al-Maashri; Michael DeBole; Matthew Cotter; Nandhini Chandramoorthy; Yang Xiao 002; Vijaykrishnan Narayanan; Chaitali Chakrabarti (DAC, 2012)

Saliency aware display power management. - Yang Xiao 002; Kevin M. Irick; Vijaykrishnan Narayanan; Donghwa Shin; Naehyuck Chang (DATE, 2013)

Dynamic bandwidth adaptation using recognition accuracy prediction through pre-classification for embedded vision systems. - Yang Xiao 002; Chuanjun Zhang; Kevin Inck; Vijaykrishnan Narayanan (ICCD, 2013)

Saliency-driven dynamic configuration of HMAX for energy-efficient multi-object recognition. - Sungho Park; Ahmed Al-Maashri; Yang Xiao 002; Kevin M. Irick; Vijaykrishnan Narayanan (ISVLSI, 2013)

A task-oriented vision system. - Yang Xiao 002; Kevin M. Irick; Jack Sampson; Vijaykrishnan Narayanan; Chuanjun Zhang (ACM Great Lakes Symposium on VLSI, 2014)

Independently-Controlled-Gate FinFET 6T SRAM Cell Design for Leakage Current Reduction and Enhanced Read Access Speed. - Kaisheng Ma; Huichu Liu; Yang Xiao 002; Yang Zheng; Xueqing Li 002; Sumeet Kumar Gupta; Yuan Xie 001; Vijaykrishnan Narayanan (ISVLSI, 2014)

A Saliency-Driven LCD Power Management System. - Yang Xiao 002; Siddharth Advani; Donghwa Shin; Naehyuck Chang; Jack Sampson; Vijaykrishnan Narayanan (IEEE Trans. Very Large Scale Integr. Syst., 2016)