A 2.3-ps RMS Resolution Time-to-Digital Converter Implemented in a Low-Cost Cyclone V FPGA. - Tengjie Sui; Zhixiang Zhao; Siwei Xie; Yangze Xie; Yanyan Zhao; Qiu Huang; Jianfeng Xu; Qiyu Peng (IEEE Trans. Instrum. Meas., 2019)