A low power CMOS voltage reference based on body effect. - Yanhan Zeng; Yunling Luo; Jun Zhang 003; Zhuqian Gong; Hong-Zhou Tan (IEICE Electron. Express, 2013)

An ultra-low-power CMOS voltage reference generator based on body bias technique. - Yanhan Zeng; Yirong Huang; Yunling Luo; Hong-Zhou Tan (Microelectron. J., 2013)

An output-capacitor-free low-dropout regulator with subthreshold slew-rate enhancement technique. - Yanhan Zeng; Yuankun Xu; Miaowang Zeng; Hong-Zhou Tan (Microelectron. J., 2014)

Pseudo-V2 control with adaptive compensation for fast-transient current-mode buck converter. - Yanhan Zeng; Weijie Tang; Yu-Ao Liu; Hong-Zhou Tan (Microelectron. J., 2015)

A FVF based LDO with dynamic bias current for low power RFID chips. - Yanhan Zeng; Hong-Zhou Tan (RFID-TA, 2016)

An improved Q-algorithm based on EPC Class 1 Generation 2 protocol. - Lin Peng; Yanhan Zeng; Hanyu Liu; Hong-Zhou Tan (ICIIP, 2017)

A 86 nA and sub-1 V CMOS voltage reference without resistors and special devices. - Yanhan Zeng; Xin Zhang; Hong-Zhou Tan (VLSI-SoC, 2017)

Ultra-low-power, high PSRR CMOS voltage reference with negative feedback. - Yanhan Zeng; Yu-Ao Liu; Xin Zhang; Hong-Zhou Tan (IET Circuits Devices Syst., 2017)

A push-pulled FVF based output-capacitorless LDO with adaptive power transistors. - Yanhan Zeng; Yu-Ao Liu; Xin Zhang; Hong-Zhou Tan (Microelectron. J., 2017)

Performance optimization for the CMOS voltage reference circuit based on NSGA-II. - Huajie Huang; Yanhan Zeng; Jinrui Liao; Rongjun Chen; Hong-Zhou Tan (APCCAS, 2018)

A 12.8 nA and 7.2 ppm/°C CMOS voltage reference without amplifier. - Yanhan Zeng; Sifan Huang; Xin Zhang; Hong-Zhou Tan (IEICE Electron. Express, 2018)

Performance optimization for LDO regulator based on the differential evolution. - Jintao Li; Yanhan Zeng; Hailong Wu; Ruguo Li; Jun Zhang 003; Hong-Zhou Tan (ASICON, 2019)

Fast-Transient DC-DC Converter using an Amplitude-Limited Error Amplifier with a Rapid Error-Signal Control. - Yanhan Zeng; Hong-Zhou Tan (ISCAS, 2019)

UHF RFID Indoor Positioning System With Phase Interference Model Based on Double Tag Array. - Yanhan Zeng; Xiheng Chen; Ruguo Li; Hong-Zhou Tan (IEEE Access, 2019)

High PSR output-capacitor-less LDO with double buffers technique. - Ruguo Li; Xin Zhang; Yanhan Zeng; Yihan Lin; Jingci Yang; Hong-Zhou Tan (ICECS, 2020)

High-PSR and fast-transient LDO regulator with nested adaptive FVF structure. - Ruguo Li; Yanhan Zeng; Yihan Lin; Jingci Yang; Hongzhou Tan (ICTA, 2020)

PT controlled buck converter with adaptive PCCM using charge monitoring and NMOS current sensing. - Yongnan Chen; Yanhan Zeng; Junkai Chen; Hong-Zhou Tan (VLSI-SOC, 2020)

Fast-transient, light-load efficient DC-DC converter using an auxiliary D-LDO. - Haochang Zhi; Yanhan Zeng; Wei Zhou; Hongzhou Tan (VLSI-SOC, 2020)

Automatic Structure Generation and Parameter Optimization for CMOS Voltage Reference Circuit. - Jintao Li; Yanhan Zeng; Jiaqi Wang; Jinrui Liao; Jingci Yang; Hong-Zhou Tan (IEEE Access, 2020)

A 3.9 ppm/○C, 31.5 ppm/V ultra-low-power subthreshold CMOS-only voltage reference. - Jinrui Liao; Yanhan Zeng; Jintao Li; Jingci Yang; Hong-Zhou Tan (Microelectron. J., 2020)

A $2.8μA, sub-$1μs Output-Capacitorless LDO with Transient Detecting Control Technique. - Tianxian Wu; Yanhan Zeng; Xu Li; Weijian Chen 003; Zhixian Li (APCCAS, 2021)

A 1.2 μW, 1.7 μVrms ECG Acquisition IC with Low-Noise Amplifier and Full-Digital Heartbeat Detector. - Yanhan Zeng; Zhixian Li; Weijian Chen 003; Wei Zhou (APCCAS, 2021)

A 77-nA and Three-Output CMOS Voltage Reference with -73dB PSRR for Energy Harvesting Systems. - Jingci Yang; Yanhan Zeng; Weijian Chen 003; Yihan Lin; Haochang Zhi; Hongzhou Tan (ISCAS, 2021)

A 0.3-μA Quiescent Current Output Capacitor-Less LDO with Dynamic Slew Rate Enhance Buffer. - Tianxian Wu; Yuting Zhang; Yanhan Zeng (APCCAS, 2022)

A 0.3-µW, 2.1-µVrms Neural Recording Chopper Amplifier with Low Noise DC-Servo-Loop. - Yuchen Bao; Weijian Chen 003; Zhixian Li; Yongsen Chen; Yanhan Zeng (ICTA, 2022)

Optimization of CMOS Voltage reference with Prediction based on Multi-group Hierarchical Collaborative Evolution and GBDT. - Yanhan Zeng; Peidong Lin; Mingrui Lv; Shangzuo Xie; Mingjiang Hou; Jingci Yang; Weijian Chen 003 (ISCAS, 2022)

A 15 mV-input and 71%-efficiency boost converter with 22 mV output ripple for thermoelectric energy harvesting application. - Yihan Lin; Tianxian Wu; Yanhan Zeng; Jingci Yang; Weijian Chen 003; Zhixian Li (Microelectron. J., 2022)

A 0.3-μW, 2.3-μVrms Bio-AFE With Auto-Calibrated Embedded DC-Servo-Loop. - Yuchen Bao; Yongsen Chen; Yongfu Li; Yanhan Zeng (BioCAS, 2023)

Multi-Task Evolutionary to PVT Knowledge Transfer for Analog Integrated Circuit Optimization. - Jintao Li; Haochang Zhi; Weiwei Shan; Yongfu Li 002; Yanhan Zeng; Yun Li 002 (ICCAD, 2023)

A 11 mV-Undershoot PT Controlled Buck Converter with Adaptive Pulse Train Generator. - Jiabao Zhang; Chuting Wu; Yanhan Zeng (ICTA, 2023)

A 0.6-1.2V-Input and $10 mu-200 text{mA}$-Load LDO Based on Voltage-Difference-to-Time Converter with Adaptive-Power Transistors. - Qianhui Ge; Yuting Zhang; Yanhan Zeng (MWSCAS, 2023)

A 2-$ mu mathrm{W}$, 0.64-$ mu text{Vrms}$ ECG Recording Chopper Amplifier with Digital-Current DSL. - Yanhan Zeng; Yongsen Chen; Yuchen Bao; Weijian Chen 003 (MWSCAS, 2023)

A +0.35 °C / -0.22 °C Inaccuracy CMOS-Based Temperature Sensor for IoT Applications. - Yanhan Zeng; Jie Cheng; Jianhua Chen; Wenjian Huang (MWSCAS, 2023)

Optimization of CMOS Voltage Reference with Blended Distribution Estimation Based on Parameter Evolutionary Algorithms. - Yanhan Zeng; Chenglin Li; Xiaofei Yu; Yanshen Luo; Jiahui Zhao; Jintao Li (MWSCAS, 2023)

A Dual-Output Picowatt Hybrid Voltage Reference with Digital Trimming Technique. - Yilun Jin; Yuhang Zhang 008; Zhiwen Gu; Jian Zhao 004; Zhihong Luo; Yanhan Zeng; Yongfu Li 002 (NEWCAS, 2023)

A 672-nW, 670-nVrms ECG Acquisition AFE With Noise-Tolerant Heartbeat Detector. - Yanhan Zeng; Zhixian Li; Weijian Chen 003; Wei Zhou; Yuchen Bao; Yongsen Chen; Yongfu Li 002 (IEEE Open J. Circuits Syst., 2023)

Design of All-Digital Two Phase Ping-Pong Switched Capacitor Voltage Doubler Power Converter. - Zhiwen Gu; Feng Yang; Yuhang Zhang 008; Yanhan Zeng; Zhihong Luo; Yuan Du; Li Du; Yongfu Li 002 (IEEE Trans. Circuits Syst. II Express Briefs, 2023)

A CAFVF-based output-capacitor-less LDO with PSRR improvement by feed forward and negative capacitance. - Yanhan Zeng; Qianhui Ge; Xin Zhang; Yuting Zhang; Meiling Chen; Yongfu Li (Integr., 2023)

A 348-nW, 10.5-bit Analog Front End with Amplifier Resistor Series Loop for Acoustic Application. - Zihong He; Huiwen Shi; Yongfu Li; Yanhan Zeng (APCCAS, 2024)

A 1.3 nW, 0.014 %/V and Dual-output CMOS Voltage Reference with Self-biased Current Source. - Yanshen Luo; Jingci Yang; Yongfu Li; Yanhan Zeng (APCCAS, 2024)

A 1.01μVrms, 16.5bit ECG Acquisition IC with Embedded DC-Servo-Loop and Multi Channel Discharge Dynamic Comparator. - Zihong He; Huiwen Shi; Zhuocong Li; Yongfu Li; Yanhan Zeng (BioCAS, 2024)

AnalogGym: An Open and Practical Testing Suite for Analog Circuit Synthesis. - Jintao Li; Haochang Zhi; Ruiyu Lyu; Wangzhen Li; Zhaori Bi; Keren Zhu 001; Yanhan Zeng; Weiwei Shan; Changhao Yan; Fan Yang 001; Yun Li 002; Xuan Zeng 001 (ICCAD, 2024)

Reconfigurable Buck-Boost Converter with Stacked Resonant Technology for Dual-Polarity Thermoelectric and Photovoltaic Energy Harvesting. - Zilin Yang; Yanhan Zeng (ICTA, 2024)

A 5V-Input Sub-1V-Output Single-Inductor Multi-Path Hybrid Buck Converter Achieving 96.1% Peak Efficiency with 250mΩ DCR Inductor. - Jiebao Li; Yongfu Li; Yanhan Zeng (ISCAS, 2024)

A 0.7-V and 10-nA CMOS-Only Voltage Reference with 1-mA Load Driving Capability Based on Gate-Voltage Compensation Loop. - Yanshen Luo; Wenjian Huang; Yuying Huang; Yongfu Li; Yanhan Zeng (ISCAS, 2024)

A 1.37 μW, 1.68 μVrms ECG AFE with Embedded DC-Servo Loop, Digital Calibration Unit and Three-State Ripple Reduction Loop. - Huiwen Shi; Yuchen Bao; Zihong He; Yongfu Li; Yanhan Zeng (ISCAS, 2024)

Automatic Optimal Design Method for Circuit Sizing Based on CNN Surrogate Model Assisted Differential Evolution Algorithm. - Chaoying Tang; Xiaofei Chen; Yanshen Luo; Yanhan Zeng (IEEE Access, 2024)

Robust circuit optimization under PVT variations via weight optimization problem reformulation. - Jintao Li; Yongfu Li 002; Yanhan Zeng (Expert Syst. Appl., 2024)

Synthesizing Step-Down Switched Capacitor Power Converter Topologies. - Zhiwen Gu; Yuhang Zhang 008; Yang Zhao 007; Jinghua Zhang; Yanhan Zeng; Zhihong Luo; Yongfu Li 002 (IEEE Trans. Circuits Syst. I Regul. Pap., 2024)

Knowledge Transfer Framework for PVT Robustness in Analog Integrated Circuits. - Jintao Li; Yanhan Zeng; Haochang Zhi; Jingci Yang; Weiwei Shan; Yongfu Li 002; Yun Li 002 (IEEE Trans. Circuits Syst. I Regul. Pap., 2024)

Balancing Objective Optimization and Constraint Satisfaction for Robust Analog Circuit Optimization. - Jintao Li; Haochang Zhi; Jiang Xiao; Yanhan Zeng; Weiwei Shan; Yun Li 002 (ASP-DAC, 2025)

Accelerating Comprehensive Specification Optimization of Analog Circuits Using Transient Assertions and Graph Neural Networks. - Zhenxin Chen; Jintao Li; Lin Peng; Yongfu Li; Yu Wang; Yanhan Zeng (ISCAS, 2025)

A 87.8% Peak Efficiency SIDO Energy Harvesting System with Emergency Power Supply Mode and Hybrid Zero-Current Detector. - Jingtao Fang; Lin Peng; Zilin Yang; Yu Wang; Yongfu Li; Yanhan Zeng (ISCAS, 2025)

A Low-Power BJT-Based Temperature Sensor with Wide Range and High Resolution. - Tongyu Luo; Lin Peng; Bincheng Lei; Yubin Xu; Hen Jiang; Hanjie Cai; Yongfu Li; Yanhan Zeng (ISCAS, 2025)

Hierarchical multi-task circuit modeling for PVT robustness via KAN-CNN integration. - Hanjie Cai; Jintao Li; Xiaofei Yu; Yuxin Zhang; Tongyu Luo; Wenyue Cai; Chaoying Tang; Yanhan Zeng (Expert Syst. Appl., 2025)

A 0.95 μW, 3.18 pJ K2 BJT-based temperature sensor featuring dual-frequency-domain readout with dual-clamps and current-differential-synthesis technique. - Tongyu Luo; Lin Peng; Bincheng Lei; Yubin Xu; Hen Jiang; Hanjie Cai; Yongfu Li; Yanhan Zeng (Microelectron. J., 2025)