Very High Level Synthesis for image processing applications. - Yanjing Bi; Chao Li 005; Fan Yang 019 (ICDSC, 2016)

High-level synthesis for FPGAs: code optimization strategies for real-time image processing. - Chao Li 005; Yanjing Bi; Yannick Benezeth; Dominique Ginhac; Fan Yang 019 (J. Real Time Image Process., 2018)

Fast FPGA prototyping for real-time image processing with very high-level synthesis. - Chao Li 005; Yanjing Bi; Franck Marzani; Fan Yang 019 (J. Real Time Image Process., 2019)