A Cost-Effective VLSI Architecture of VLD for MPEG-2 and AVS. - Yanmei Qu; Yu Li; Shunliang Mei (ICME, 2007)

Memory Cache Based Motion Compensation Architecture for HDTV H.264/AVC Decoder. - Yu Li; Yanmei Qu; Yun He (ISCAS, 2007)

A Novel Cost-Effective and Programmable VLSI Architecture of CAVLC Decoder for H.264/AVC. - Yanmei Qu; Yun He; Shunliang Mei (J. Signal Process. Syst., 2008)

A Cost-effective VLD Architecture for MPEG-2 and AVS. - Yanmei Qu; Shunliang Mei; Yun He (J. Signal Process. Syst., 2008)