On-Line Test Vector Generation from Temporal Constraints Written in PSL. - Yann Oddos; Katell Morin-Allory; Dominique Borrione (VLSI-SoC, 2006)

Prototyping Generators for On-line Test Vector Generation Based on PSL Properties. - Yann Oddos; Katell Morin-Allory; Dominique Borrione (DDECS, 2007)

Assertion-Based Design with Horus. - Yann Oddos; Katell Morin-Allory; Dominique Borrione (MEMOCODE, 2008)

MYGEN: automata-based on-line test generator for assertion-based verification. - Yann Oddos; Katell Morin-Allory; Dominique Borrione; Marc Boule; Zeljko Zilic (ACM Great Lakes Symposium on VLSI, 2009)

From Assertion-Based Verification to Assertion-Based Synthesis. - Yann Oddos; Katell Morin-Allory; Dominique Borrione (VLSI-SoC, 2009)